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Side by Side Diff: src/mips64/code-stubs-mips64.h

Issue 1480623002: Never call CpuFeatures::FlushICache directly (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: updates Created 5 years ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_MIPS_CODE_STUBS_MIPS64_H_ 5 #ifndef V8_MIPS_CODE_STUBS_MIPS64_H_
6 #define V8_MIPS_CODE_STUBS_MIPS64_H_ 6 #define V8_MIPS_CODE_STUBS_MIPS64_H_
7 7
8 #include "src/mips64/frames-mips64.h" 8 #include "src/mips64/frames-mips64.h"
9 9
10 namespace v8 { 10 namespace v8 {
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153 case INCREMENTAL: 153 case INCREMENTAL:
154 DCHECK(GetMode(stub) == STORE_BUFFER_ONLY); 154 DCHECK(GetMode(stub) == STORE_BUFFER_ONLY);
155 PatchNopIntoBranch(&masm, 0); 155 PatchNopIntoBranch(&masm, 0);
156 break; 156 break;
157 case INCREMENTAL_COMPACTION: 157 case INCREMENTAL_COMPACTION:
158 DCHECK(GetMode(stub) == STORE_BUFFER_ONLY); 158 DCHECK(GetMode(stub) == STORE_BUFFER_ONLY);
159 PatchNopIntoBranch(&masm, 2 * Assembler::kInstrSize); 159 PatchNopIntoBranch(&masm, 2 * Assembler::kInstrSize);
160 break; 160 break;
161 } 161 }
162 DCHECK(GetMode(stub) == mode); 162 DCHECK(GetMode(stub) == mode);
163 CpuFeatures::FlushICache(stub->instruction_start(), 163 Assembler::FlushICache(stub->GetIsolate(), stub->instruction_start(),
164 4 * Assembler::kInstrSize); 164 4 * Assembler::kInstrSize);
165 } 165 }
166 166
167 DEFINE_NULL_CALL_INTERFACE_DESCRIPTOR(); 167 DEFINE_NULL_CALL_INTERFACE_DESCRIPTOR();
168 168
169 private: 169 private:
170 // This is a helper class for freeing up 3 scratch registers. The input is 170 // This is a helper class for freeing up 3 scratch registers. The input is
171 // two registers that must be preserved and one scratch register provided by 171 // two registers that must be preserved and one scratch register provided by
172 // the caller. 172 // the caller.
173 class RegisterAllocation { 173 class RegisterAllocation {
174 public: 174 public:
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340 340
341 DEFINE_NULL_CALL_INTERFACE_DESCRIPTOR(); 341 DEFINE_NULL_CALL_INTERFACE_DESCRIPTOR();
342 DEFINE_PLATFORM_CODE_STUB(NameDictionaryLookup, PlatformCodeStub); 342 DEFINE_PLATFORM_CODE_STUB(NameDictionaryLookup, PlatformCodeStub);
343 }; 343 };
344 344
345 345
346 } // namespace internal 346 } // namespace internal
347 } // namespace v8 347 } // namespace v8
348 348
349 #endif // V8_MIPS_CODE_STUBS_MIPS64_H_ 349 #endif // V8_MIPS_CODE_STUBS_MIPS64_H_
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