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| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 #include "vm/disassembler.h" | 5 #include "vm/disassembler.h" |
| 6 | 6 |
| 7 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM. | 7 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM. |
| 8 #if defined(TARGET_ARCH_ARM) | 8 #if defined(TARGET_ARCH_ARM) |
| 9 #include "platform/assert.h" | 9 #include "platform/assert.h" |
| 10 | 10 |
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| 594 case 3: { | 594 case 3: { |
| 595 if (instr->Bits(21, 2) == 0x1) { | 595 if (instr->Bits(21, 2) == 0x1) { |
| 596 Format(instr, "blx'cond 'rm"); | 596 Format(instr, "blx'cond 'rm"); |
| 597 } else { | 597 } else { |
| 598 // Could be inlined constant. | 598 // Could be inlined constant. |
| 599 Unknown(instr); | 599 Unknown(instr); |
| 600 } | 600 } |
| 601 break; | 601 break; |
| 602 } | 602 } |
| 603 case 7: { | 603 case 7: { |
| 604 if (instr->Bits(21, 2) == 0x1) { | 604 if ((instr->Bits(21, 2) == 0x1) && (instr->ConditionField() == AL)) { |
| 605 Format(instr, "bkpt'cond #'imm12_4"); | 605 Format(instr, "bkpt #'imm12_4"); |
| 606 } else { | 606 } else { |
| 607 // Format(instr, "smc'cond"); | 607 // Format(instr, "smc'cond"); |
| 608 Unknown(instr); // Not used. | 608 Unknown(instr); // Not used. |
| 609 } | 609 } |
| 610 break; | 610 break; |
| 611 } | 611 } |
| 612 default: { | 612 default: { |
| 613 Unknown(instr); // Not used. | 613 Unknown(instr); // Not used. |
| 614 break; | 614 break; |
| 615 } | 615 } |
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| 854 UNREACHABLE(); | 854 UNREACHABLE(); |
| 855 break; | 855 break; |
| 856 } | 856 } |
| 857 } | 857 } |
| 858 } | 858 } |
| 859 | 859 |
| 860 | 860 |
| 861 void ARMDecoder::DecodeType3(Instr* instr) { | 861 void ARMDecoder::DecodeType3(Instr* instr) { |
| 862 if (instr->IsDivision()) { | 862 if (instr->IsDivision()) { |
| 863 if (instr->Bit(21)) { | 863 if (instr->Bit(21)) { |
| 864 Format(instr, "udiv'cond 'rd, 'rn, 'rm"); | 864 Format(instr, "udiv'cond 'rn, 'rs, 'rm"); |
| 865 } else { | 865 } else { |
| 866 Format(instr, "sdiv'cond 'rd, 'rn, 'rm"); | 866 Format(instr, "sdiv'cond 'rn, 'rs, 'rm"); |
| 867 } | 867 } |
| 868 return; | 868 return; |
| 869 } | 869 } |
| 870 switch (instr->PUField()) { | 870 switch (instr->PUField()) { |
| 871 case 0: { | 871 case 0: { |
| 872 if (instr->HasW()) { | 872 if (instr->HasW()) { |
| 873 Unknown(instr); | 873 Unknown(instr); |
| 874 } else { | 874 } else { |
| 875 Format(instr, "'memop'cond'b 'rd, ['rn], -'shift_rm"); | 875 Format(instr, "'memop'cond'b 'rd, ['rn], -'shift_rm"); |
| 876 } | 876 } |
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| 1306 human_buffer, | 1306 human_buffer, |
| 1307 sizeof(human_buffer), | 1307 sizeof(human_buffer), |
| 1308 pc); | 1308 pc); |
| 1309 pc += instruction_length; | 1309 pc += instruction_length; |
| 1310 } | 1310 } |
| 1311 } | 1311 } |
| 1312 | 1312 |
| 1313 } // namespace dart | 1313 } // namespace dart |
| 1314 | 1314 |
| 1315 #endif // defined TARGET_ARCH_ARM | 1315 #endif // defined TARGET_ARCH_ARM |
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