Subzero. ARM32. Folding rematerializable offsets in address operands.

src/IceInstARM32.cpp

 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 223 matching lines @@
   assert(!isNegAddrMode());
   NumVars = 1;
   Vars = &this->Base;
 }
 
 OperandARM32Mem::OperandARM32Mem(Cfg *Func, Type Ty, Variable *Base,
                                  Variable *Index, ShiftKind ShiftOp,
                                  uint16_t ShiftAmt, AddrMode Mode)
     : OperandARM32(kMem, Ty), Base(Base), ImmOffset(0), Index(Index),
       ShiftOp(ShiftOp), ShiftAmt(ShiftAmt), Mode(Mode) {
+  if (Index->isRematerializable()) {
+    llvm::report_fatal_error("Rematerializable Index Register is not allowed.");
+  }
   NumVars = 2;
   Vars = Func->allocateArrayOf<Variable *>(2);
   Vars[0] = Base;
   Vars[1] = Index;
 }
 
 OperandARM32ShAmtImm::OperandARM32ShAmtImm(ConstantInteger32 *SA)
     : OperandARM32(kShAmtImm, IceType_i8), ShAmt(SA) {}
 
 bool OperandARM32Mem::canHoldOffset(Type Ty, bool SignExt, int32_t Offset) {
   int32_t Bits = SignExt ? TypeARM32Attributes[Ty].SExtAddrOffsetBits
                          : TypeARM32Attributes[Ty].ZExtAddrOffsetBits;
   if (Bits == 0)
     return Offset == 0;
   // Note that encodings for offsets are sign-magnitude for ARM, so we check
   // with IsAbsoluteUint().
+  // Scalar fp, and vector types require an offset that is aligned to a multiple
+  // of 4.
+  if (isScalarFloatingType(Ty) || isVectorType(Ty))
+    return Utils::IsAligned(Offset, 4) && Utils::IsAbsoluteUint(Bits, Offset);
   return Utils::IsAbsoluteUint(Bits, Offset);
 }
 
 OperandARM32FlexImm::OperandARM32FlexImm(Cfg * /* Func */, Type Ty,
                                          uint32_t Imm, uint32_t RotateAmt)
     : OperandARM32Flex(kFlexImm, Ty), Imm(Imm), RotateAmt(RotateAmt) {
   NumVars = 0;
   Vars = nullptr;
 }
 
@@ skipping 1627 matching lines @@
 template class InstARM32UnaryopFP<InstARM32::Vsqrt>;
 
 template class InstARM32FourAddrGPR<InstARM32::Mla>;
 template class InstARM32FourAddrGPR<InstARM32::Mls>;
 
 template class InstARM32CmpLike<InstARM32::Cmn>;
 template class InstARM32CmpLike<InstARM32::Cmp>;
 template class InstARM32CmpLike<InstARM32::Tst>;
 
 } // end of namespace Ice