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Issue 1477753002: [turbofan] Implemented the optional Float32RoundTiesEven operator. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@f32trunc
Patch Set: Merging with the changed codebase Created 5 years ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 6
7 #include "src/arm/macro-assembler-arm.h" 7 #include "src/arm/macro-assembler-arm.h"
8 #include "src/compiler/code-generator-impl.h" 8 #include "src/compiler/code-generator-impl.h"
9 #include "src/compiler/gap-resolver.h" 9 #include "src/compiler/gap-resolver.h"
10 #include "src/compiler/node-matchers.h" 10 #include "src/compiler/node-matchers.h"
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805 break; 805 break;
806 case kArmVrintzF32: 806 case kArmVrintzF32:
807 __ vrintz(i.OutputFloat32Register(), i.InputFloat32Register(0)); 807 __ vrintz(i.OutputFloat32Register(), i.InputFloat32Register(0));
808 break; 808 break;
809 case kArmVrintzF64: 809 case kArmVrintzF64:
810 __ vrintz(i.OutputFloat64Register(), i.InputFloat64Register(0)); 810 __ vrintz(i.OutputFloat64Register(), i.InputFloat64Register(0));
811 break; 811 break;
812 case kArmVrintaF64: 812 case kArmVrintaF64:
813 __ vrinta(i.OutputFloat64Register(), i.InputFloat64Register(0)); 813 __ vrinta(i.OutputFloat64Register(), i.InputFloat64Register(0));
814 break; 814 break;
815 case kArmVrintnF32:
816 __ vrintn(i.OutputFloat32Register(), i.InputFloat32Register(0));
817 break;
815 case kArmVrintnF64: 818 case kArmVrintnF64:
816 __ vrintn(i.OutputFloat64Register(), i.InputFloat64Register(0)); 819 __ vrintn(i.OutputFloat64Register(), i.InputFloat64Register(0));
817 break; 820 break;
818 case kArmVcvtF32F64: { 821 case kArmVcvtF32F64: {
819 __ vcvt_f32_f64(i.OutputFloat32Register(), i.InputFloat64Register(0)); 822 __ vcvt_f32_f64(i.OutputFloat32Register(), i.InputFloat64Register(0));
820 DCHECK_EQ(LeaveCC, i.OutputSBit()); 823 DCHECK_EQ(LeaveCC, i.OutputSBit());
821 break; 824 break;
822 } 825 }
823 case kArmVcvtF64F32: { 826 case kArmVcvtF64F32: {
824 __ vcvt_f64_f32(i.OutputFloat64Register(), i.InputFloat32Register(0)); 827 __ vcvt_f64_f32(i.OutputFloat64Register(), i.InputFloat32Register(0));
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1372 padding_size -= v8::internal::Assembler::kInstrSize; 1375 padding_size -= v8::internal::Assembler::kInstrSize;
1373 } 1376 }
1374 } 1377 }
1375 } 1378 }
1376 1379
1377 #undef __ 1380 #undef __
1378 1381
1379 } // namespace compiler 1382 } // namespace compiler
1380 } // namespace internal 1383 } // namespace internal
1381 } // namespace v8 1384 } // namespace v8
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