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Unified Diff: test/cctest/test-disasm-arm64.cc

Issue 1476763002: Make whether or not a Code object should be created by masm explicit (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: enum class FTW Created 5 years, 1 month ago
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Index: test/cctest/test-disasm-arm64.cc
diff --git a/test/cctest/test-disasm-arm64.cc b/test/cctest/test-disasm-arm64.cc
index 36ac8fda165fa567a1e14d011c08db8c85a3ff50..c7433b394f35d08bc3d1e41e1ed30e78ee6e4bc8 100644
--- a/test/cctest/test-disasm-arm64.cc
+++ b/test/cctest/test-disasm-arm64.cc
@@ -48,20 +48,31 @@ using namespace v8::internal;
#define EXP_SIZE (256)
#define INSTR_SIZE (1024)
-#define SET_UP_CLASS(ASMCLASS) \
+#define SET_UP_MASM() \
+ InitializeVM(); \
+ Isolate* isolate = CcTest::i_isolate(); \
+ HandleScope scope(isolate); \
+ byte* buf = static_cast<byte*>(malloc(INSTR_SIZE)); \
+ uint32_t encoding = 0; \
+ MacroAssembler* assm = new MacroAssembler( \
+ isolate, buf, INSTR_SIZE, v8::internal::CodeObjectRequired::kYes); \
+ Decoder<DispatchingDecoderVisitor>* decoder = \
+ new Decoder<DispatchingDecoderVisitor>(); \
+ DisassemblingDecoder* disasm = new DisassemblingDecoder(); \
+ decoder->AppendVisitor(disasm)
+
+#define SET_UP_ASM() \
InitializeVM(); \
Isolate* isolate = CcTest::i_isolate(); \
HandleScope scope(isolate); \
byte* buf = static_cast<byte*>(malloc(INSTR_SIZE)); \
uint32_t encoding = 0; \
- ASMCLASS* assm = new ASMCLASS(isolate, buf, INSTR_SIZE); \
+ Assembler* assm = new Assembler(isolate, buf, INSTR_SIZE); \
Decoder<DispatchingDecoderVisitor>* decoder = \
new Decoder<DispatchingDecoderVisitor>(); \
DisassemblingDecoder* disasm = new DisassemblingDecoder(); \
decoder->AppendVisitor(disasm)
-#define SET_UP() SET_UP_CLASS(Assembler)
-
#define COMPARE(ASM, EXP) \
assm->Reset(); \
assm->ASM; \
@@ -105,7 +116,7 @@ static void InitializeVM() {
TEST_(bootstrap) {
- SET_UP();
+ SET_UP_ASM();
// Instructions generated by C compiler, disassembled by objdump, and
// reformatted to suit our disassembly style.
@@ -135,7 +146,7 @@ TEST_(bootstrap) {
TEST_(mov_mvn) {
- SET_UP_CLASS(MacroAssembler);
+ SET_UP_MASM();
COMPARE(Mov(w0, Operand(0x1234)), "movz w0, #0x1234");
COMPARE(Mov(x1, Operand(0x1234)), "movz x1, #0x1234");
@@ -169,7 +180,7 @@ TEST_(mov_mvn) {
TEST_(move_immediate) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(movz(w0, 0x1234), "movz w0, #0x1234");
COMPARE(movz(x1, 0xabcd0000), "movz x1, #0xabcd0000");
@@ -206,7 +217,7 @@ TEST_(move_immediate) {
TEST(move_immediate_2) {
- SET_UP_CLASS(MacroAssembler);
+ SET_UP_MASM();
// Move instructions expected for certain immediates. This is really a macro
// assembler test, to ensure it generates immediates efficiently.
@@ -262,7 +273,7 @@ TEST(move_immediate_2) {
TEST_(add_immediate) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(add(w0, w1, Operand(0xff)), "add w0, w1, #0xff (255)");
COMPARE(add(x2, x3, Operand(0x3ff)), "add x2, x3, #0x3ff (1023)");
@@ -292,7 +303,7 @@ TEST_(add_immediate) {
TEST_(sub_immediate) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(sub(w0, w1, Operand(0xff)), "sub w0, w1, #0xff (255)");
COMPARE(sub(x2, x3, Operand(0x3ff)), "sub x2, x3, #0x3ff (1023)");
@@ -320,7 +331,7 @@ TEST_(sub_immediate) {
TEST_(add_shifted) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(add(w0, w1, Operand(w2)), "add w0, w1, w2");
COMPARE(add(x3, x4, Operand(x5)), "add x3, x4, x5");
@@ -346,7 +357,7 @@ TEST_(add_shifted) {
TEST_(sub_shifted) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(sub(w0, w1, Operand(w2)), "sub w0, w1, w2");
COMPARE(sub(x3, x4, Operand(x5)), "sub x3, x4, x5");
@@ -376,7 +387,7 @@ TEST_(sub_shifted) {
TEST_(add_extended) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(add(w0, w1, Operand(w2, UXTB)), "add w0, w1, w2, uxtb");
COMPARE(adds(x3, x4, Operand(w5, UXTB, 1)), "adds x3, x4, w5, uxtb #1");
@@ -402,7 +413,7 @@ TEST_(add_extended) {
TEST_(sub_extended) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(sub(w0, w1, Operand(w2, UXTB)), "sub w0, w1, w2, uxtb");
COMPARE(subs(x3, x4, Operand(w5, UXTB, 1)), "subs x3, x4, w5, uxtb #1");
@@ -428,7 +439,7 @@ TEST_(sub_extended) {
TEST_(adc_subc_ngc) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(adc(w0, w1, Operand(w2)), "adc w0, w1, w2");
COMPARE(adc(x3, x4, Operand(x5)), "adc x3, x4, x5");
@@ -448,7 +459,7 @@ TEST_(adc_subc_ngc) {
TEST_(mul_and_div) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(mul(w0, w1, w2), "mul w0, w1, w2");
COMPARE(mul(x3, x4, x5), "mul x3, x4, x5");
@@ -481,7 +492,7 @@ TEST_(mul_and_div) {
TEST(maddl_msubl) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(smaddl(x0, w1, w2, x3), "smaddl x0, w1, w2, x3");
COMPARE(smaddl(x25, w21, w22, x16), "smaddl x25, w21, w22, x16");
@@ -498,7 +509,7 @@ TEST(maddl_msubl) {
TEST_(dp_1_source) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(rbit(w0, w1), "rbit w0, w1");
COMPARE(rbit(x2, x3), "rbit x2, x3");
@@ -517,7 +528,7 @@ TEST_(dp_1_source) {
TEST_(bitfield) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(sxtb(w0, w1), "sxtb w0, w1");
COMPARE(sxtb(x2, x3), "sxtb x2, w3");
@@ -559,7 +570,7 @@ TEST_(bitfield) {
TEST_(extract) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(extr(w0, w1, w2, 0), "extr w0, w1, w2, #0");
COMPARE(extr(x3, x4, x5, 1), "extr x3, x4, x5, #1");
@@ -573,7 +584,7 @@ TEST_(extract) {
TEST_(logical_immediate) {
- SET_UP();
+ SET_UP_ASM();
#define RESULT_SIZE (256)
char result[RESULT_SIZE];
@@ -699,7 +710,7 @@ TEST_(logical_immediate) {
TEST_(logical_shifted) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(and_(w0, w1, Operand(w2)), "and w0, w1, w2");
COMPARE(and_(x3, x4, Operand(x5, LSL, 1)), "and x3, x4, x5, lsl #1");
@@ -769,7 +780,7 @@ TEST_(logical_shifted) {
TEST_(dp_2_source) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(lslv(w0, w1, w2), "lsl w0, w1, w2");
COMPARE(lslv(x3, x4, x5), "lsl x3, x4, x5");
@@ -785,7 +796,7 @@ TEST_(dp_2_source) {
TEST_(adr) {
- SET_UP();
+ SET_UP_ASM();
COMPARE_PREFIX(adr(x0, 0), "adr x0, #+0x0");
COMPARE_PREFIX(adr(x1, 1), "adr x1, #+0x1");
@@ -801,7 +812,7 @@ TEST_(adr) {
TEST_(branch) {
- SET_UP();
+ SET_UP_ASM();
#define INST_OFF(x) ((x) >> kInstructionSizeLog2)
COMPARE_PREFIX(b(INST_OFF(0x4)), "b #+0x4");
@@ -838,7 +849,7 @@ TEST_(branch) {
TEST_(load_store) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(ldr(w0, MemOperand(x1)), "ldr w0, [x1]");
COMPARE(ldr(w2, MemOperand(x3, 4)), "ldr w2, [x3, #4]");
@@ -895,7 +906,7 @@ TEST_(load_store) {
TEST_(load_store_regoffset) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(ldr(w0, MemOperand(x1, w2, UXTW)), "ldr w0, [x1, w2, uxtw]");
COMPARE(ldr(w3, MemOperand(x4, w5, UXTW, 2)), "ldr w3, [x4, w5, uxtw #2]");
@@ -980,7 +991,7 @@ TEST_(load_store_regoffset) {
TEST_(load_store_byte) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(ldrb(w0, MemOperand(x1)), "ldrb w0, [x1]");
COMPARE(ldrb(x2, MemOperand(x3)), "ldrb w2, [x3]");
@@ -1012,7 +1023,7 @@ TEST_(load_store_byte) {
TEST_(load_store_half) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(ldrh(w0, MemOperand(x1)), "ldrh w0, [x1]");
COMPARE(ldrh(x2, MemOperand(x3)), "ldrh w2, [x3]");
@@ -1048,7 +1059,7 @@ TEST_(load_store_half) {
TEST_(load_store_fp) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(ldr(s0, MemOperand(x1)), "ldr s0, [x1]");
COMPARE(ldr(s2, MemOperand(x3, 4)), "ldr s2, [x3, #4]");
@@ -1100,7 +1111,7 @@ TEST_(load_store_fp) {
TEST_(load_store_unscaled) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(ldr(w0, MemOperand(x1, 1)), "ldur w0, [x1, #1]");
COMPARE(ldr(w2, MemOperand(x3, -1)), "ldur w2, [x3, #-1]");
@@ -1133,7 +1144,7 @@ TEST_(load_store_unscaled) {
TEST_(load_store_pair) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(ldp(w0, w1, MemOperand(x2)), "ldp w0, w1, [x2]");
COMPARE(ldp(x3, x4, MemOperand(x5)), "ldp x3, x4, [x5]");
@@ -1254,7 +1265,7 @@ TEST_(load_store_pair) {
#if 0 // TODO(all): enable.
TEST_(load_literal) {
- SET_UP();
+ SET_UP_ASM();
COMPARE_PREFIX(ldr(x10, 0x1234567890abcdefUL), "ldr x10, pc+8");
COMPARE_PREFIX(ldr(w20, 0xfedcba09), "ldr w20, pc+8");
@@ -1266,7 +1277,7 @@ TEST_(load_literal) {
#endif
TEST_(cond_select) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(csel(w0, w1, w2, eq), "csel w0, w1, w2, eq");
COMPARE(csel(x3, x4, x5, ne), "csel x3, x4, x5, ne");
@@ -1301,7 +1312,7 @@ TEST_(cond_select) {
TEST(cond_select_macro) {
- SET_UP_CLASS(MacroAssembler);
+ SET_UP_MASM();
COMPARE(Csel(w0, w1, -1, eq), "csinv w0, w1, wzr, eq");
COMPARE(Csel(w2, w3, 0, ne), "csel w2, w3, wzr, ne");
@@ -1315,7 +1326,7 @@ TEST(cond_select_macro) {
TEST_(cond_cmp) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(ccmn(w0, w1, NZCVFlag, eq), "ccmn w0, w1, #NZCV, eq");
COMPARE(ccmn(x2, x3, NZCFlag, ne), "ccmn x2, x3, #NZCv, ne");
@@ -1333,7 +1344,7 @@ TEST_(cond_cmp) {
TEST_(cond_cmp_macro) {
- SET_UP_CLASS(MacroAssembler);
+ SET_UP_MASM();
COMPARE(Ccmp(w0, -1, VFlag, hi), "ccmn w0, #1, #nzcV, hi");
COMPARE(Ccmp(x1, -31, CFlag, ge), "ccmn x1, #31, #nzCv, ge");
@@ -1345,7 +1356,7 @@ TEST_(cond_cmp_macro) {
TEST_(fmov_imm) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(fmov(s0, 1.0f), "fmov s0, #0x70 (1.0000)");
COMPARE(fmov(s31, -13.0f), "fmov s31, #0xaa (-13.0000)");
@@ -1357,7 +1368,7 @@ TEST_(fmov_imm) {
TEST_(fmov_reg) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(fmov(w3, s13), "fmov w3, s13");
COMPARE(fmov(x6, d26), "fmov x6, d26");
@@ -1371,7 +1382,7 @@ TEST_(fmov_reg) {
TEST_(fp_dp1) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(fabs(s0, s1), "fabs s0, s1");
COMPARE(fabs(s31, s30), "fabs s31, s30");
@@ -1409,7 +1420,7 @@ TEST_(fp_dp1) {
TEST_(fp_dp2) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(fadd(s0, s1, s2), "fadd s0, s1, s2");
COMPARE(fadd(d3, d4, d5), "fadd d3, d4, d5");
@@ -1433,7 +1444,7 @@ TEST_(fp_dp2) {
TEST(fp_dp3) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(fmadd(s7, s8, s9, s10), "fmadd s7, s8, s9, s10");
COMPARE(fmadd(d10, d11, d12, d10), "fmadd d10, d11, d12, d10");
@@ -1450,7 +1461,7 @@ TEST(fp_dp3) {
TEST_(fp_compare) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(fcmp(s0, s1), "fcmp s0, s1");
COMPARE(fcmp(s31, s30), "fcmp s31, s30");
@@ -1464,7 +1475,7 @@ TEST_(fp_compare) {
TEST_(fp_cond_compare) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(fccmp(s0, s1, NoFlag, eq), "fccmp s0, s1, #nzcv, eq");
COMPARE(fccmp(s2, s3, ZVFlag, ne), "fccmp s2, s3, #nZcV, ne");
@@ -1482,7 +1493,7 @@ TEST_(fp_cond_compare) {
TEST_(fp_select) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(fcsel(s0, s1, s2, eq), "fcsel s0, s1, s2, eq")
COMPARE(fcsel(s31, s31, s30, ne), "fcsel s31, s31, s30, ne");
@@ -1496,7 +1507,7 @@ TEST_(fp_select) {
TEST_(fcvt_scvtf_ucvtf) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(fcvtas(w0, s1), "fcvtas w0, s1");
COMPARE(fcvtas(x2, s3), "fcvtas x2, s3");
@@ -1558,7 +1569,7 @@ TEST_(fcvt_scvtf_ucvtf) {
TEST_(system_mrs) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(mrs(x0, NZCV), "mrs x0, nzcv");
COMPARE(mrs(lr, NZCV), "mrs lr, nzcv");
@@ -1569,7 +1580,7 @@ TEST_(system_mrs) {
TEST_(system_msr) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(msr(NZCV, x0), "msr nzcv, x0");
COMPARE(msr(NZCV, x30), "msr nzcv, lr");
@@ -1580,7 +1591,7 @@ TEST_(system_msr) {
TEST_(system_nop) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(nop(), "nop");
@@ -1589,7 +1600,7 @@ TEST_(system_nop) {
TEST_(debug) {
- SET_UP();
+ SET_UP_ASM();
DCHECK(kImmExceptionIsDebug == 0xdeb0);
@@ -1608,7 +1619,7 @@ TEST_(debug) {
TEST_(hlt) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(hlt(0), "hlt #0x0");
COMPARE(hlt(1), "hlt #0x1");
@@ -1619,7 +1630,7 @@ TEST_(hlt) {
TEST_(brk) {
- SET_UP();
+ SET_UP_ASM();
COMPARE(brk(0), "brk #0x0");
COMPARE(brk(1), "brk #0x1");
@@ -1630,7 +1641,7 @@ TEST_(brk) {
TEST_(add_sub_negative) {
- SET_UP_CLASS(MacroAssembler);
+ SET_UP_MASM();
COMPARE(Add(x10, x0, -42), "sub x10, x0, #0x2a (42)");
COMPARE(Add(x11, x1, -687), "sub x11, x1, #0x2af (687)");
@@ -1661,7 +1672,7 @@ TEST_(add_sub_negative) {
TEST_(logical_immediate_move) {
- SET_UP_CLASS(MacroAssembler);
+ SET_UP_MASM();
COMPARE(And(w0, w1, 0), "movz w0, #0x0");
COMPARE(And(x0, x1, 0), "movz x0, #0x0");
@@ -1700,7 +1711,7 @@ TEST_(logical_immediate_move) {
TEST_(barriers) {
- SET_UP_CLASS(MacroAssembler);
+ SET_UP_MASM();
// DMB
COMPARE(Dmb(FullSystem, BarrierAll), "dmb sy");
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