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Issue 1476063002: [turbofan] Implemented the TruncateFloat32ToInt64 TurboFan operator. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Increased the type of opcodes from uint8_t to uint16_t. Created 5 years ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/x64/assembler-x64.h" 5 #include "src/x64/assembler-x64.h"
6 6
7 #include <cstring> 7 #include <cstring>
8 8
9 #if V8_TARGET_ARCH_X64 9 #if V8_TARGET_ARCH_X64
10 10
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3105 DCHECK(!IsEnabled(AVX)); 3105 DCHECK(!IsEnabled(AVX));
3106 EnsureSpace ensure_space(this); 3106 EnsureSpace ensure_space(this);
3107 emit(0xF2); 3107 emit(0xF2);
3108 emit_optional_rex_32(dst, src); 3108 emit_optional_rex_32(dst, src);
3109 emit(0x0F); 3109 emit(0x0F);
3110 emit(0x2C); 3110 emit(0x2C);
3111 emit_sse_operand(dst, src); 3111 emit_sse_operand(dst, src);
3112 } 3112 }
3113 3113
3114 3114
3115 void Assembler::cvttss2siq(Register dst, XMMRegister src) {
3116 DCHECK(!IsEnabled(AVX));
3117 EnsureSpace ensure_space(this);
3118 emit(0xF3);
3119 emit_rex_64(dst, src);
3120 emit(0x0F);
3121 emit(0x2C);
3122 emit_sse_operand(dst, src);
3123 }
3124
3125
3126 void Assembler::cvttss2siq(Register dst, const Operand& src) {
3127 DCHECK(!IsEnabled(AVX));
3128 EnsureSpace ensure_space(this);
3129 emit(0xF3);
3130 emit_rex_64(dst, src);
3131 emit(0x0F);
3132 emit(0x2C);
3133 emit_sse_operand(dst, src);
3134 }
3135
3136
3115 void Assembler::cvttsd2siq(Register dst, XMMRegister src) { 3137 void Assembler::cvttsd2siq(Register dst, XMMRegister src) {
3116 DCHECK(!IsEnabled(AVX)); 3138 DCHECK(!IsEnabled(AVX));
3117 EnsureSpace ensure_space(this); 3139 EnsureSpace ensure_space(this);
3118 emit(0xF2); 3140 emit(0xF2);
3119 emit_rex_64(dst, src); 3141 emit_rex_64(dst, src);
3120 emit(0x0F); 3142 emit(0x0F);
3121 emit(0x2C); 3143 emit(0x2C);
3122 emit_sse_operand(dst, src); 3144 emit_sse_operand(dst, src);
3123 } 3145 }
3124 3146
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4115 4137
4116 bool RelocInfo::IsInConstantPool() { 4138 bool RelocInfo::IsInConstantPool() {
4117 return false; 4139 return false;
4118 } 4140 }
4119 4141
4120 4142
4121 } // namespace internal 4143 } // namespace internal
4122 } // namespace v8 4144 } // namespace v8
4123 4145
4124 #endif // V8_TARGET_ARCH_X64 4146 #endif // V8_TARGET_ARCH_X64
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