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Side by Side Diff: src/compiler/arm64/instruction-codes-arm64.h

Issue 1474963002: [turbofan] Implemented the optional Float32RoundUp operator. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@f32rounddown
Patch Set: Created 5 years ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ 5 #ifndef V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_
6 #define V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ 6 #define V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 83 matching lines...) Expand 10 before | Expand all | Expand 10 after
94 V(Arm64Float64Sub) \ 94 V(Arm64Float64Sub) \
95 V(Arm64Float64Mul) \ 95 V(Arm64Float64Mul) \
96 V(Arm64Float64Div) \ 96 V(Arm64Float64Div) \
97 V(Arm64Float64Mod) \ 97 V(Arm64Float64Mod) \
98 V(Arm64Float64Max) \ 98 V(Arm64Float64Max) \
99 V(Arm64Float64Min) \ 99 V(Arm64Float64Min) \
100 V(Arm64Float64Abs) \ 100 V(Arm64Float64Abs) \
101 V(Arm64Float64Neg) \ 101 V(Arm64Float64Neg) \
102 V(Arm64Float64Sqrt) \ 102 V(Arm64Float64Sqrt) \
103 V(Arm64Float64RoundDown) \ 103 V(Arm64Float64RoundDown) \
104 V(Arm64Float32RoundUp) \
104 V(Arm64Float64RoundUp) \ 105 V(Arm64Float64RoundUp) \
105 V(Arm64Float64RoundTiesAway) \ 106 V(Arm64Float64RoundTiesAway) \
106 V(Arm64Float64RoundTruncate) \ 107 V(Arm64Float64RoundTruncate) \
107 V(Arm64Float64RoundTiesEven) \ 108 V(Arm64Float64RoundTiesEven) \
108 V(Arm64Float32ToFloat64) \ 109 V(Arm64Float32ToFloat64) \
109 V(Arm64Float64ToFloat32) \ 110 V(Arm64Float64ToFloat32) \
110 V(Arm64Float64ToInt32) \ 111 V(Arm64Float64ToInt32) \
111 V(Arm64Float64ToUint32) \ 112 V(Arm64Float64ToUint32) \
112 V(Arm64Float64ToInt64) \ 113 V(Arm64Float64ToInt64) \
113 V(Arm64Float64ToUint64) \ 114 V(Arm64Float64ToUint64) \
(...skipping 48 matching lines...) Expand 10 before | Expand all | Expand 10 after
162 V(Operand2_R_UXTB) /* %r0 UXTB (unsigned extend byte) */ \ 163 V(Operand2_R_UXTB) /* %r0 UXTB (unsigned extend byte) */ \
163 V(Operand2_R_UXTH) /* %r0 UXTH (unsigned extend halfword) */ \ 164 V(Operand2_R_UXTH) /* %r0 UXTH (unsigned extend halfword) */ \
164 V(Operand2_R_SXTB) /* %r0 SXTB (signed extend byte) */ \ 165 V(Operand2_R_SXTB) /* %r0 SXTB (signed extend byte) */ \
165 V(Operand2_R_SXTH) /* %r0 SXTH (signed extend halfword) */ 166 V(Operand2_R_SXTH) /* %r0 SXTH (signed extend halfword) */
166 167
167 } // namespace compiler 168 } // namespace compiler
168 } // namespace internal 169 } // namespace internal
169 } // namespace v8 170 } // namespace v8
170 171
171 #endif // V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ 172 #endif // V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_
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