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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ | 5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ |
6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ | 6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
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47 V(ArmVcmpF32) \ | 47 V(ArmVcmpF32) \ |
48 V(ArmVaddF32) \ | 48 V(ArmVaddF32) \ |
49 V(ArmVsubF32) \ | 49 V(ArmVsubF32) \ |
50 V(ArmVmulF32) \ | 50 V(ArmVmulF32) \ |
51 V(ArmVmlaF32) \ | 51 V(ArmVmlaF32) \ |
52 V(ArmVmlsF32) \ | 52 V(ArmVmlsF32) \ |
53 V(ArmVdivF32) \ | 53 V(ArmVdivF32) \ |
54 V(ArmVabsF32) \ | 54 V(ArmVabsF32) \ |
55 V(ArmVnegF32) \ | 55 V(ArmVnegF32) \ |
56 V(ArmVsqrtF32) \ | 56 V(ArmVsqrtF32) \ |
57 V(ArmVrintmF32) \ | |
58 V(ArmVcmpF64) \ | 57 V(ArmVcmpF64) \ |
59 V(ArmVaddF64) \ | 58 V(ArmVaddF64) \ |
60 V(ArmVsubF64) \ | 59 V(ArmVsubF64) \ |
61 V(ArmVmulF64) \ | 60 V(ArmVmulF64) \ |
62 V(ArmVmlaF64) \ | 61 V(ArmVmlaF64) \ |
63 V(ArmVmlsF64) \ | 62 V(ArmVmlsF64) \ |
64 V(ArmVdivF64) \ | 63 V(ArmVdivF64) \ |
65 V(ArmVmodF64) \ | 64 V(ArmVmodF64) \ |
66 V(ArmVabsF64) \ | 65 V(ArmVabsF64) \ |
67 V(ArmVnegF64) \ | 66 V(ArmVnegF64) \ |
68 V(ArmVsqrtF64) \ | 67 V(ArmVsqrtF64) \ |
| 68 V(ArmVrintmF32) \ |
69 V(ArmVrintmF64) \ | 69 V(ArmVrintmF64) \ |
| 70 V(ArmVrintpF32) \ |
70 V(ArmVrintpF64) \ | 71 V(ArmVrintpF64) \ |
71 V(ArmVrintzF64) \ | 72 V(ArmVrintzF64) \ |
72 V(ArmVrintaF64) \ | 73 V(ArmVrintaF64) \ |
73 V(ArmVrintnF64) \ | 74 V(ArmVrintnF64) \ |
74 V(ArmVcvtF32F64) \ | 75 V(ArmVcvtF32F64) \ |
75 V(ArmVcvtF64F32) \ | 76 V(ArmVcvtF64F32) \ |
76 V(ArmVcvtF64S32) \ | 77 V(ArmVcvtF64S32) \ |
77 V(ArmVcvtF64U32) \ | 78 V(ArmVcvtF64U32) \ |
78 V(ArmVcvtS32F64) \ | 79 V(ArmVcvtS32F64) \ |
79 V(ArmVcvtU32F64) \ | 80 V(ArmVcvtU32F64) \ |
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114 V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \ | 115 V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \ |
115 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \ | 116 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \ |
116 V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \ | 117 V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \ |
117 V(Operand2_R_ROR_R) /* %r0 ROR %r1 */ | 118 V(Operand2_R_ROR_R) /* %r0 ROR %r1 */ |
118 | 119 |
119 } // namespace compiler | 120 } // namespace compiler |
120 } // namespace internal | 121 } // namespace internal |
121 } // namespace v8 | 122 } // namespace v8 |
122 | 123 |
123 #endif // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ | 124 #endif // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ |
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