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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/compiler/code-generator.h" | 5 #include "src/compiler/code-generator.h" |
6 | 6 |
7 #include "src/arm/macro-assembler-arm.h" | 7 #include "src/arm/macro-assembler-arm.h" |
8 #include "src/compiler/code-generator-impl.h" | 8 #include "src/compiler/code-generator-impl.h" |
9 #include "src/compiler/gap-resolver.h" | 9 #include "src/compiler/gap-resolver.h" |
10 #include "src/compiler/node-matchers.h" | 10 #include "src/compiler/node-matchers.h" |
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719 break; | 719 break; |
720 case kArmVsqrtF32: | 720 case kArmVsqrtF32: |
721 __ vsqrt(i.OutputFloat32Register(), i.InputFloat32Register(0)); | 721 __ vsqrt(i.OutputFloat32Register(), i.InputFloat32Register(0)); |
722 break; | 722 break; |
723 case kArmVabsF32: | 723 case kArmVabsF32: |
724 __ vabs(i.OutputFloat32Register(), i.InputFloat32Register(0)); | 724 __ vabs(i.OutputFloat32Register(), i.InputFloat32Register(0)); |
725 break; | 725 break; |
726 case kArmVnegF32: | 726 case kArmVnegF32: |
727 __ vneg(i.OutputFloat32Register(), i.InputFloat32Register(0)); | 727 __ vneg(i.OutputFloat32Register(), i.InputFloat32Register(0)); |
728 break; | 728 break; |
729 case kArmVrintmF32: | |
730 __ vrintm(i.OutputFloat32Register(), i.InputFloat32Register(0)); | |
731 break; | |
732 case kArmVcmpF64: | 729 case kArmVcmpF64: |
733 if (instr->InputAt(1)->IsDoubleRegister()) { | 730 if (instr->InputAt(1)->IsDoubleRegister()) { |
734 __ VFPCompareAndSetFlags(i.InputFloat64Register(0), | 731 __ VFPCompareAndSetFlags(i.InputFloat64Register(0), |
735 i.InputFloat64Register(1)); | 732 i.InputFloat64Register(1)); |
736 } else { | 733 } else { |
737 DCHECK(instr->InputAt(1)->IsImmediate()); | 734 DCHECK(instr->InputAt(1)->IsImmediate()); |
738 // 0.0 is the only immediate supported by vcmp instructions. | 735 // 0.0 is the only immediate supported by vcmp instructions. |
739 DCHECK(i.InputDouble(1) == 0.0); | 736 DCHECK(i.InputDouble(1) == 0.0); |
740 __ VFPCompareAndSetFlags(i.InputFloat64Register(0), i.InputDouble(1)); | 737 __ VFPCompareAndSetFlags(i.InputFloat64Register(0), i.InputDouble(1)); |
741 } | 738 } |
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787 } | 784 } |
788 case kArmVsqrtF64: | 785 case kArmVsqrtF64: |
789 __ vsqrt(i.OutputFloat64Register(), i.InputFloat64Register(0)); | 786 __ vsqrt(i.OutputFloat64Register(), i.InputFloat64Register(0)); |
790 break; | 787 break; |
791 case kArmVabsF64: | 788 case kArmVabsF64: |
792 __ vabs(i.OutputFloat64Register(), i.InputFloat64Register(0)); | 789 __ vabs(i.OutputFloat64Register(), i.InputFloat64Register(0)); |
793 break; | 790 break; |
794 case kArmVnegF64: | 791 case kArmVnegF64: |
795 __ vneg(i.OutputFloat64Register(), i.InputFloat64Register(0)); | 792 __ vneg(i.OutputFloat64Register(), i.InputFloat64Register(0)); |
796 break; | 793 break; |
| 794 case kArmVrintmF32: |
| 795 __ vrintm(i.OutputFloat32Register(), i.InputFloat32Register(0)); |
| 796 break; |
797 case kArmVrintmF64: | 797 case kArmVrintmF64: |
798 __ vrintm(i.OutputFloat64Register(), i.InputFloat64Register(0)); | 798 __ vrintm(i.OutputFloat64Register(), i.InputFloat64Register(0)); |
799 break; | 799 break; |
| 800 case kArmVrintpF32: |
| 801 __ vrintp(i.OutputFloat32Register(), i.InputFloat32Register(0)); |
| 802 break; |
800 case kArmVrintpF64: | 803 case kArmVrintpF64: |
801 __ vrintp(i.OutputFloat64Register(), i.InputFloat64Register(0)); | 804 __ vrintp(i.OutputFloat64Register(), i.InputFloat64Register(0)); |
802 break; | 805 break; |
803 case kArmVrintzF64: | 806 case kArmVrintzF64: |
804 __ vrintz(i.OutputFloat64Register(), i.InputFloat64Register(0)); | 807 __ vrintz(i.OutputFloat64Register(), i.InputFloat64Register(0)); |
805 break; | 808 break; |
806 case kArmVrintaF64: | 809 case kArmVrintaF64: |
807 __ vrinta(i.OutputFloat64Register(), i.InputFloat64Register(0)); | 810 __ vrinta(i.OutputFloat64Register(), i.InputFloat64Register(0)); |
808 break; | 811 break; |
809 case kArmVrintnF64: | 812 case kArmVrintnF64: |
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1366 padding_size -= v8::internal::Assembler::kInstrSize; | 1369 padding_size -= v8::internal::Assembler::kInstrSize; |
1367 } | 1370 } |
1368 } | 1371 } |
1369 } | 1372 } |
1370 | 1373 |
1371 #undef __ | 1374 #undef __ |
1372 | 1375 |
1373 } // namespace compiler | 1376 } // namespace compiler |
1374 } // namespace internal | 1377 } // namespace internal |
1375 } // namespace v8 | 1378 } // namespace v8 |
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