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Issue 1474963002: [turbofan] Implemented the optional Float32RoundUp operator. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@f32rounddown
Patch Set: Created 5 years ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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1208 const DwVfpRegister src, 1208 const DwVfpRegister src,
1209 const Condition cond = al); 1209 const Condition cond = al);
1210 void vsqrt(const SwVfpRegister dst, const SwVfpRegister src, 1210 void vsqrt(const SwVfpRegister dst, const SwVfpRegister src,
1211 const Condition cond = al); 1211 const Condition cond = al);
1212 1212
1213 // ARMv8 rounding instructions. 1213 // ARMv8 rounding instructions.
1214 void vrinta(const DwVfpRegister dst, const DwVfpRegister src); 1214 void vrinta(const DwVfpRegister dst, const DwVfpRegister src);
1215 void vrintn(const DwVfpRegister dst, const DwVfpRegister src); 1215 void vrintn(const DwVfpRegister dst, const DwVfpRegister src);
1216 void vrintm(const SwVfpRegister dst, const SwVfpRegister src); 1216 void vrintm(const SwVfpRegister dst, const SwVfpRegister src);
1217 void vrintm(const DwVfpRegister dst, const DwVfpRegister src); 1217 void vrintm(const DwVfpRegister dst, const DwVfpRegister src);
1218 void vrintp(const SwVfpRegister dst, const SwVfpRegister src);
1218 void vrintp(const DwVfpRegister dst, const DwVfpRegister src); 1219 void vrintp(const DwVfpRegister dst, const DwVfpRegister src);
1219 void vrintz(const DwVfpRegister dst, const DwVfpRegister src, 1220 void vrintz(const DwVfpRegister dst, const DwVfpRegister src,
1220 const Condition cond = al); 1221 const Condition cond = al);
1221 1222
1222 // Support for NEON. 1223 // Support for NEON.
1223 // All these APIs support D0 to D31 and Q0 to Q15. 1224 // All these APIs support D0 to D31 and Q0 to Q15.
1224 1225
1225 void vld1(NeonSize size, 1226 void vld1(NeonSize size,
1226 const NeonListOperand& dst, 1227 const NeonListOperand& dst,
1227 const NeonMemOperand& src); 1228 const NeonMemOperand& src);
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1622 explicit EnsureSpace(Assembler* assembler) { 1623 explicit EnsureSpace(Assembler* assembler) {
1623 assembler->CheckBuffer(); 1624 assembler->CheckBuffer();
1624 } 1625 }
1625 }; 1626 };
1626 1627
1627 1628
1628 } // namespace internal 1629 } // namespace internal
1629 } // namespace v8 1630 } // namespace v8
1630 1631
1631 #endif // V8_ARM_ASSEMBLER_ARM_H_ 1632 #endif // V8_ARM_ASSEMBLER_ARM_H_
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