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Side by Side Diff: src/arm64/instructions-arm64.h

Issue 1474763008: Always pass an Isolate to AssemblerBase (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: updates Created 5 years ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_ARM64_INSTRUCTIONS_ARM64_H_ 5 #ifndef V8_ARM64_INSTRUCTIONS_ARM64_H_
6 #define V8_ARM64_INSTRUCTIONS_ARM64_H_ 6 #define V8_ARM64_INSTRUCTIONS_ARM64_H_
7 7
8 #include "src/arm64/constants-arm64.h" 8 #include "src/arm64/constants-arm64.h"
9 #include "src/arm64/utils-arm64.h" 9 #include "src/arm64/utils-arm64.h"
10 #include "src/globals.h" 10 #include "src/globals.h"
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366 int64_t ImmPCOffset(); 366 int64_t ImmPCOffset();
367 367
368 // Find the target of this instruction. 'this' may be a branch or a 368 // Find the target of this instruction. 'this' may be a branch or a
369 // PC-relative addressing instruction. 369 // PC-relative addressing instruction.
370 Instruction* ImmPCOffsetTarget(); 370 Instruction* ImmPCOffsetTarget();
371 371
372 static bool IsValidImmPCOffset(ImmBranchType branch_type, ptrdiff_t offset); 372 static bool IsValidImmPCOffset(ImmBranchType branch_type, ptrdiff_t offset);
373 bool IsTargetInImmPCOffsetRange(Instruction* target); 373 bool IsTargetInImmPCOffsetRange(Instruction* target);
374 // Patch a PC-relative offset to refer to 'target'. 'this' may be a branch or 374 // Patch a PC-relative offset to refer to 'target'. 'this' may be a branch or
375 // a PC-relative addressing instruction. 375 // a PC-relative addressing instruction.
376 void SetImmPCOffsetTarget(Instruction* target); 376 void SetImmPCOffsetTarget(Isolate* isolate, Instruction* target);
377 void SetUnresolvedInternalReferenceImmTarget(Instruction* target); 377 void SetUnresolvedInternalReferenceImmTarget(Isolate* isolate,
378 Instruction* target);
378 // Patch a literal load instruction to load from 'source'. 379 // Patch a literal load instruction to load from 'source'.
379 void SetImmLLiteral(Instruction* source); 380 void SetImmLLiteral(Instruction* source);
380 381
381 uintptr_t LiteralAddress() { 382 uintptr_t LiteralAddress() {
382 int offset = ImmLLiteral() << kLoadLiteralScaleLog2; 383 int offset = ImmLLiteral() << kLoadLiteralScaleLog2;
383 return reinterpret_cast<uintptr_t>(this) + offset; 384 return reinterpret_cast<uintptr_t>(this) + offset;
384 } 385 }
385 386
386 enum CheckAlignment { NO_CHECK, CHECK_ALIGNMENT }; 387 enum CheckAlignment { NO_CHECK, CHECK_ALIGNMENT };
387 388
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403 return reinterpret_cast<Instruction*>(src); 404 return reinterpret_cast<Instruction*>(src);
404 } 405 }
405 406
406 V8_INLINE ptrdiff_t DistanceTo(Instruction* target) { 407 V8_INLINE ptrdiff_t DistanceTo(Instruction* target) {
407 return reinterpret_cast<Address>(target) - reinterpret_cast<Address>(this); 408 return reinterpret_cast<Address>(target) - reinterpret_cast<Address>(this);
408 } 409 }
409 410
410 411
411 static const int ImmPCRelRangeBitwidth = 21; 412 static const int ImmPCRelRangeBitwidth = 21;
412 static bool IsValidPCRelOffset(ptrdiff_t offset) { return is_int21(offset); } 413 static bool IsValidPCRelOffset(ptrdiff_t offset) { return is_int21(offset); }
413 void SetPCRelImmTarget(Instruction* target); 414 void SetPCRelImmTarget(Isolate* isolate, Instruction* target);
414 void SetBranchImmTarget(Instruction* target); 415 void SetBranchImmTarget(Instruction* target);
415 }; 416 };
416 417
417 418
418 // Where Instruction looks at instructions generated by the Assembler, 419 // Where Instruction looks at instructions generated by the Assembler,
419 // InstructionSequence looks at instructions sequences generated by the 420 // InstructionSequence looks at instructions sequences generated by the
420 // MacroAssembler. 421 // MacroAssembler.
421 class InstructionSequence : public Instruction { 422 class InstructionSequence : public Instruction {
422 public: 423 public:
423 static InstructionSequence* At(Address address) { 424 static InstructionSequence* At(Address address) {
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530 TRACE_DISABLE = 2 << 6, 531 TRACE_DISABLE = 2 << 6,
531 TRACE_OVERRIDE = 3 << 6 532 TRACE_OVERRIDE = 3 << 6
532 }; 533 };
533 534
534 535
535 } // namespace internal 536 } // namespace internal
536 } // namespace v8 537 } // namespace v8
537 538
538 539
539 #endif // V8_ARM64_INSTRUCTIONS_ARM64_H_ 540 #endif // V8_ARM64_INSTRUCTIONS_ARM64_H_
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