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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
| 6 // met: | 6 // met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 97 | 97 |
| 98 | 98 |
| 99 int RelocInfo::target_address_size() { | 99 int RelocInfo::target_address_size() { |
| 100 return Assembler::kSpecialTargetSize; | 100 return Assembler::kSpecialTargetSize; |
| 101 } | 101 } |
| 102 | 102 |
| 103 | 103 |
| 104 void RelocInfo::set_target_address(Address target, | 104 void RelocInfo::set_target_address(Address target, |
| 105 WriteBarrierMode write_barrier_mode, | 105 WriteBarrierMode write_barrier_mode, |
| 106 ICacheFlushMode icache_flush_mode) { | 106 ICacheFlushMode icache_flush_mode) { |
| 107 Assembler::set_target_address_at(pc_, host_, target, icache_flush_mode); | 107 Assembler::set_target_address_at(isolate_, pc_, host_, target, |
| 108 icache_flush_mode); |
| 108 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_)); | 109 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_)); |
| 109 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL && | 110 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL && |
| 110 IsCodeTarget(rmode_)) { | 111 IsCodeTarget(rmode_)) { |
| 111 Object* target_code = Code::GetCodeFromTargetAddress(target); | 112 Object* target_code = Code::GetCodeFromTargetAddress(target); |
| 112 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode( | 113 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode( |
| 113 host(), this, HeapObject::cast(target_code)); | 114 host(), this, HeapObject::cast(target_code)); |
| 114 } | 115 } |
| 115 } | 116 } |
| 116 | 117 |
| 117 | 118 |
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| 222 DCHECK(*pc_ == kCallOpcode); | 223 DCHECK(*pc_ == kCallOpcode); |
| 223 return Code::GetCodeFromTargetAddress( | 224 return Code::GetCodeFromTargetAddress( |
| 224 Assembler::target_address_at(pc_ + 1, host_)); | 225 Assembler::target_address_at(pc_ + 1, host_)); |
| 225 } | 226 } |
| 226 | 227 |
| 227 | 228 |
| 228 void RelocInfo::set_code_age_stub(Code* stub, | 229 void RelocInfo::set_code_age_stub(Code* stub, |
| 229 ICacheFlushMode icache_flush_mode) { | 230 ICacheFlushMode icache_flush_mode) { |
| 230 DCHECK(*pc_ == kCallOpcode); | 231 DCHECK(*pc_ == kCallOpcode); |
| 231 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE); | 232 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE); |
| 232 Assembler::set_target_address_at(pc_ + 1, host_, stub->instruction_start(), | 233 Assembler::set_target_address_at( |
| 233 icache_flush_mode); | 234 isolate_, pc_ + 1, host_, stub->instruction_start(), icache_flush_mode); |
| 234 } | 235 } |
| 235 | 236 |
| 236 | 237 |
| 237 Address RelocInfo::debug_call_address() { | 238 Address RelocInfo::debug_call_address() { |
| 238 DCHECK(IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()); | 239 DCHECK(IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()); |
| 239 Address location = pc_ + Assembler::kPatchDebugBreakSlotAddressOffset; | 240 Address location = pc_ + Assembler::kPatchDebugBreakSlotAddressOffset; |
| 240 return Assembler::target_address_at(location, host_); | 241 return Assembler::target_address_at(location, host_); |
| 241 } | 242 } |
| 242 | 243 |
| 243 | 244 |
| 244 void RelocInfo::set_debug_call_address(Address target) { | 245 void RelocInfo::set_debug_call_address(Address target) { |
| 245 DCHECK(IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()); | 246 DCHECK(IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()); |
| 246 Address location = pc_ + Assembler::kPatchDebugBreakSlotAddressOffset; | 247 Address location = pc_ + Assembler::kPatchDebugBreakSlotAddressOffset; |
| 247 Assembler::set_target_address_at(location, host_, target); | 248 Assembler::set_target_address_at(isolate_, location, host_, target); |
| 248 if (host() != NULL) { | 249 if (host() != NULL) { |
| 249 Object* target_code = Code::GetCodeFromTargetAddress(target); | 250 Object* target_code = Code::GetCodeFromTargetAddress(target); |
| 250 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode( | 251 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode( |
| 251 host(), this, HeapObject::cast(target_code)); | 252 host(), this, HeapObject::cast(target_code)); |
| 252 } | 253 } |
| 253 } | 254 } |
| 254 | 255 |
| 255 | 256 |
| 256 void RelocInfo::WipeOut() { | 257 void RelocInfo::WipeOut() { |
| 257 if (IsEmbeddedObject(rmode_) || IsExternalReference(rmode_) || | 258 if (IsEmbeddedObject(rmode_) || IsExternalReference(rmode_) || |
| 258 IsInternalReference(rmode_)) { | 259 IsInternalReference(rmode_)) { |
| 259 Memory::Address_at(pc_) = NULL; | 260 Memory::Address_at(pc_) = NULL; |
| 260 } else if (IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_)) { | 261 } else if (IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_)) { |
| 261 // Effectively write zero into the relocation. | 262 // Effectively write zero into the relocation. |
| 262 Assembler::set_target_address_at(pc_, host_, pc_ + sizeof(int32_t)); | 263 Assembler::set_target_address_at(isolate_, pc_, host_, |
| 264 pc_ + sizeof(int32_t)); |
| 263 } else { | 265 } else { |
| 264 UNREACHABLE(); | 266 UNREACHABLE(); |
| 265 } | 267 } |
| 266 } | 268 } |
| 267 | 269 |
| 268 | 270 |
| 269 bool RelocInfo::IsPatchedReturnSequence() { | 271 bool RelocInfo::IsPatchedReturnSequence() { |
| 270 return *pc_ == kCallOpcode; | 272 return *pc_ == kCallOpcode; |
| 271 } | 273 } |
| 272 | 274 |
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| 446 reinterpret_cast<uint16_t*>(pc_)[0] = value; | 448 reinterpret_cast<uint16_t*>(pc_)[0] = value; |
| 447 pc_ += sizeof(uint16_t); | 449 pc_ += sizeof(uint16_t); |
| 448 } | 450 } |
| 449 | 451 |
| 450 | 452 |
| 451 Address Assembler::target_address_at(Address pc, Address constant_pool) { | 453 Address Assembler::target_address_at(Address pc, Address constant_pool) { |
| 452 return pc + sizeof(int32_t) + *reinterpret_cast<int32_t*>(pc); | 454 return pc + sizeof(int32_t) + *reinterpret_cast<int32_t*>(pc); |
| 453 } | 455 } |
| 454 | 456 |
| 455 | 457 |
| 456 void Assembler::set_target_address_at(Address pc, Address constant_pool, | 458 void Assembler::set_target_address_at(Isolate* isolate, Address pc, |
| 457 Address target, | 459 Address constant_pool, Address target, |
| 458 ICacheFlushMode icache_flush_mode) { | 460 ICacheFlushMode icache_flush_mode) { |
| 459 int32_t* p = reinterpret_cast<int32_t*>(pc); | 461 int32_t* p = reinterpret_cast<int32_t*>(pc); |
| 460 *p = target - (pc + sizeof(int32_t)); | 462 *p = target - (pc + sizeof(int32_t)); |
| 461 if (icache_flush_mode != SKIP_ICACHE_FLUSH) { | 463 if (icache_flush_mode != SKIP_ICACHE_FLUSH) { |
| 462 Assembler::FlushICacheWithoutIsolate(p, sizeof(int32_t)); | 464 Assembler::FlushICache(isolate, p, sizeof(int32_t)); |
| 463 } | 465 } |
| 464 } | 466 } |
| 465 | 467 |
| 466 | 468 |
| 467 Address Assembler::target_address_from_return_address(Address pc) { | 469 Address Assembler::target_address_from_return_address(Address pc) { |
| 468 return pc - kCallTargetAddressOffset; | 470 return pc - kCallTargetAddressOffset; |
| 469 } | 471 } |
| 470 | 472 |
| 471 | 473 |
| 472 Displacement Assembler::disp_at(Label* L) { | 474 Displacement Assembler::disp_at(Label* L) { |
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| 492 int offset = L->near_link_pos() - pc_offset(); | 494 int offset = L->near_link_pos() - pc_offset(); |
| 493 DCHECK(is_int8(offset)); | 495 DCHECK(is_int8(offset)); |
| 494 disp = static_cast<byte>(offset & 0xFF); | 496 disp = static_cast<byte>(offset & 0xFF); |
| 495 } | 497 } |
| 496 L->link_to(pc_offset(), Label::kNear); | 498 L->link_to(pc_offset(), Label::kNear); |
| 497 *pc_++ = disp; | 499 *pc_++ = disp; |
| 498 } | 500 } |
| 499 | 501 |
| 500 | 502 |
| 501 void Assembler::deserialization_set_target_internal_reference_at( | 503 void Assembler::deserialization_set_target_internal_reference_at( |
| 502 Address pc, Address target, RelocInfo::Mode mode) { | 504 Isolate* isolate, Address pc, Address target, RelocInfo::Mode mode) { |
| 503 Memory::Address_at(pc) = target; | 505 Memory::Address_at(pc) = target; |
| 504 } | 506 } |
| 505 | 507 |
| 506 | 508 |
| 507 void Operand::set_modrm(int mod, Register rm) { | 509 void Operand::set_modrm(int mod, Register rm) { |
| 508 DCHECK((mod & -4) == 0); | 510 DCHECK((mod & -4) == 0); |
| 509 buf_[0] = mod << 6 | rm.code(); | 511 buf_[0] = mod << 6 | rm.code(); |
| 510 len_ = 1; | 512 len_ = 1; |
| 511 } | 513 } |
| 512 | 514 |
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| 556 | 558 |
| 557 Operand::Operand(Immediate imm) { | 559 Operand::Operand(Immediate imm) { |
| 558 // [disp/r] | 560 // [disp/r] |
| 559 set_modrm(0, ebp); | 561 set_modrm(0, ebp); |
| 560 set_dispr(imm.x_, imm.rmode_); | 562 set_dispr(imm.x_, imm.rmode_); |
| 561 } | 563 } |
| 562 } // namespace internal | 564 } // namespace internal |
| 563 } // namespace v8 | 565 } // namespace v8 |
| 564 | 566 |
| 565 #endif // V8_IA32_ASSEMBLER_IA32_INL_H_ | 567 #endif // V8_IA32_ASSEMBLER_IA32_INL_H_ |
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