| Index: src/mips64/simulator-mips64.cc
|
| diff --git a/src/mips64/simulator-mips64.cc b/src/mips64/simulator-mips64.cc
|
| index ed3cf3563b66c84dd4476384df96d65c56035358..2440770b19aad0c1c4583b739dd2b81b59937426 100644
|
| --- a/src/mips64/simulator-mips64.cc
|
| +++ b/src/mips64/simulator-mips64.cc
|
| @@ -2259,10 +2259,12 @@ void Simulator::DecodeTypeRegisterSRsType() {
|
| set_fpu_register_float(fd_reg(), -fs);
|
| break;
|
| case SQRT_S:
|
| - set_fpu_register_float(fd_reg(), fast_sqrt(fs));
|
| + lazily_initialize_fast_sqrt(isolate_);
|
| + set_fpu_register_float(fd_reg(), fast_sqrt(fs, isolate_));
|
| break;
|
| case RSQRT_S: {
|
| - float result = 1.0 / fast_sqrt(fs);
|
| + lazily_initialize_fast_sqrt(isolate_);
|
| + float result = 1.0 / fast_sqrt(fs, isolate_);
|
| set_fpu_register_float(fd_reg(), result);
|
| break;
|
| }
|
| @@ -2764,10 +2766,12 @@ void Simulator::DecodeTypeRegisterDRsType() {
|
| set_fpu_register_double(fd_reg(), -fs);
|
| break;
|
| case SQRT_D:
|
| - set_fpu_register_double(fd_reg(), fast_sqrt(fs));
|
| + lazily_initialize_fast_sqrt(isolate_);
|
| + set_fpu_register_double(fd_reg(), fast_sqrt(fs, isolate_));
|
| break;
|
| case RSQRT_D: {
|
| - double result = 1.0 / fast_sqrt(fs);
|
| + lazily_initialize_fast_sqrt(isolate_);
|
| + double result = 1.0 / fast_sqrt(fs, isolate_);
|
| set_fpu_register_double(fd_reg(), result);
|
| break;
|
| }
|
|
|