Unify alloca, outgoing arg, and prolog construction

src/IceTargetLoweringX8664.cpp

Index: src/IceTargetLoweringX8664.cpp
diff --git a/src/IceTargetLoweringX8664.cpp b/src/IceTargetLoweringX8664.cpp
index 6abf3bcc62d2d89d870e2dfa23e05ca110fe53ef..c1692425224d1bb6013395cb25c1e2459c9a64cd 100644
--- a/src/IceTargetLoweringX8664.cpp
+++ b/src/IceTargetLoweringX8664.cpp
@@ -170,7 +170,7 @@ void TargetX8664::lowerCall(const InstCall *Instr) {
   OperandList XmmArgs;
   OperandList GprArgs;
   OperandList StackArgs, StackArgLocations;
-  uint32_t ParameterAreaSizeBytes = 0;
+  int32_t ParameterAreaSizeBytes = 0;
 
   // Classify each argument operand according to the location where the
   // argument is passed.
@@ -204,16 +204,8 @@ void TargetX8664::lowerCall(const InstCall *Instr) {
   // Adjust the parameter area so that the stack is aligned. It is assumed that
   // the stack is already aligned at the start of the calling sequence.
   ParameterAreaSizeBytes = Traits::applyStackAlignment(ParameterAreaSizeBytes);
-
-  // Subtract the appropriate amount for the argument area. This also takes
-  // care of setting the stack adjustment during emission.
-  //
-  // TODO: If for some reason the call instruction gets dead-code eliminated
-  // after lowering, we would need to ensure that the pre-call and the
-  // post-call esp adjustment get eliminated as well.
-  if (ParameterAreaSizeBytes) {
-    _adjust_stack(ParameterAreaSizeBytes);
-  }
+  assert(static_cast<uint32_t>(ParameterAreaSizeBytes) <=
+         maxOutArgsSizeBytes());
 
   // Copy arguments that are passed on the stack to the appropriate stack
   // locations.
@@ -409,6 +401,10 @@ void TargetX8664::addProlog(CfgNode *Node) {
   // +------------------------+
   // | 8. allocas             |
   // +------------------------+
+  // | 9. padding             |
+  // +------------------------+
+  // | 10. out args           |
+  // +------------------------+ <--- StackPointer
   //
   // The following variables record the size in bytes of the given areas:
   //  * X86_RET_IP_SIZE_BYTES:  area 1
@@ -417,7 +413,8 @@ void TargetX8664::addProlog(CfgNode *Node) {
   //  * GlobalsSize:            area 4
   //  * GlobalsAndSubsequentPaddingSize: areas 4 - 5
   //  * LocalsSpillAreaSize:    area 6
-  //  * SpillAreaSizeBytes:     areas 3 - 7
+  //  * SpillAreaSizeBytes:     areas 3 - 10
+  //  * maxOutArgsSizeBytes():  area 10
 
   // Determine stack frame offsets for each Variable without a register
   // assignment. This can be done as one variable per stack slot. Or, do
@@ -514,24 +511,36 @@ void TargetX8664::addProlog(CfgNode *Node) {
         Traits::X86_RET_IP_SIZE_BYTES + PreservedRegsSizeBytes;
     uint32_t StackSize =
         Traits::applyStackAlignment(StackOffset + SpillAreaSizeBytes);
+    StackSize = Traits::applyStackAlignment(StackSize + maxOutArgsSizeBytes());
     SpillAreaSizeBytes = StackSize - StackOffset;
+  } else {
+    SpillAreaSizeBytes += maxOutArgsSizeBytes();
   }
 
+  // Combine fixed allocations into SpillAreaSizeBytes if we are emitting the
+  // fixed allocations in the prolog.
+  if (PrologEmitsFixedAllocas)
+    SpillAreaSizeBytes += FixedAllocaSizeBytes;
   // Generate "sub esp, SpillAreaSizeBytes"
-  if (SpillAreaSizeBytes)
+  if (SpillAreaSizeBytes) {
     _sub(getPhysicalRegister(Traits::RegisterSet::Reg_esp),
          Ctx->getConstantInt32(SpillAreaSizeBytes));
+    // If the fixed allocas are aligned more than the stack frame, align the
+    // stack pointer accordingly.
+    if (PrologEmitsFixedAllocas &&
+        FixedAllocaAlignBytes > Traits::X86_STACK_ALIGNMENT_BYTES) {
+      assert(IsEbpBasedFrame);
+      _and(getPhysicalRegister(Traits::RegisterSet::Reg_esp),
+           Ctx->getConstantInt32(-FixedAllocaAlignBytes));
+    }
+  }
 
   // Account for alloca instructions with known frame offsets.
-  SpillAreaSizeBytes += FixedAllocaSizeBytes;
+  if (!PrologEmitsFixedAllocas)
+    SpillAreaSizeBytes += FixedAllocaSizeBytes;
 
   Ctx->statsUpdateFrameBytes(SpillAreaSizeBytes);
 
-  // Initialize the stack adjustment so that after all the known-frame-offset
-  // alloca instructions are emitted, the stack adjustment will reach zero.
-  resetStackAdjustment();
-  updateStackAdjustment(-FixedAllocaSizeBytes);
-
   // Fill in stack offsets for stack args, and copy args into registers for
   // those that were register-allocated. Args are pushed right to left, so
   // Arg[0] is closest to the stack/frame pointer.
@@ -563,7 +572,9 @@ void TargetX8664::addProlog(CfgNode *Node) {
     // until after all the fixed-size alloca instructions have executed.  In
     // this case, a stack adjustment is needed when accessing in-args in order
     // to copy them into registers.
-    size_t StackAdjBytes = IsEbpBasedFrame ? 0 : -FixedAllocaSizeBytes;
+    size_t StackAdjBytes = 0;
+    if (!IsEbpBasedFrame && !PrologEmitsFixedAllocas)
+      StackAdjBytes -= FixedAllocaSizeBytes;
     finishArgumentLowering(Arg, FramePtr, BasicFrameOffset, StackAdjBytes,
                            InArgsSizeBytes);
   }
@@ -588,7 +599,8 @@ void TargetX8664::addProlog(CfgNode *Node) {
     Str << "Stack layout:\n";
     uint32_t EspAdjustmentPaddingSize =
         SpillAreaSizeBytes - LocalsSpillAreaSize -
-        GlobalsAndSubsequentPaddingSize - SpillAreaPaddingBytes;
+        GlobalsAndSubsequentPaddingSize - SpillAreaPaddingBytes -
+        maxOutArgsSizeBytes();
     Str << " in-args = " << InArgsSizeBytes << " bytes\n"
         << " return address = " << Traits::X86_RET_IP_SIZE_BYTES << " bytes\n"
         << " preserved registers = " << PreservedRegsSizeBytes << " bytes\n"
@@ -603,6 +615,7 @@ void TargetX8664::addProlog(CfgNode *Node) {
     Str << "Stack details:\n"
         << " esp adjustment = " << SpillAreaSizeBytes << " bytes\n"
         << " spill area alignment = " << SpillAreaAlignmentBytes << " bytes\n"
+        << " outgoing args size = " << maxOutArgsSizeBytes() << " bytes\n"
         << " locals spill area alignment = " << LocalsSlotsAlignmentBytes
         << " bytes\n"
         << " is ebp based = " << IsEbpBasedFrame << "\n";