Unify alloca, outgoing arg, and prolog construction

src/IceTargetLoweringX8632.cpp

 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 151 matching lines @@
   Variable *Dest = Instr->getDest();
   if (Dest != nullptr && isScalarFloatingType(Dest->getType())) {
     ParameterAreaSizeBytes =
         std::max(static_cast<size_t>(ParameterAreaSizeBytes),
                  typeWidthInBytesOnStack(Dest->getType()));
   }
 
   // Adjust the parameter area so that the stack is aligned. It is assumed that
   // the stack is already aligned at the start of the calling sequence.
   ParameterAreaSizeBytes = Traits::applyStackAlignment(ParameterAreaSizeBytes);
-
-  // Subtract the appropriate amount for the argument area. This also takes
-  // care of setting the stack adjustment during emission.
-  //
-  // TODO: If for some reason the call instruction gets dead-code eliminated
-  // after lowering, we would need to ensure that the pre-call and the
-  // post-call esp adjustment get eliminated as well.
-  if (ParameterAreaSizeBytes) {
-    _adjust_stack(ParameterAreaSizeBytes);
-  }
+  assert(static_cast<uint32_t>(ParameterAreaSizeBytes) <=
+         maxOutArgsSizeBytes());
 
   // Copy arguments that are passed on the stack to the appropriate stack
   // locations.
   for (SizeT i = 0, e = StackArgs.size(); i < e; ++i) {
     lowerStore(InstStore::create(Func, StackArgs[i], StackArgLocations[i]));
   }
 
   // Copy arguments to be passed in registers to the appropriate registers.
   // TODO: Investigate the impact of lowering arguments passed in registers
   // after lowering stack arguments as opposed to the other way around.
@@ skipping 76 matching lines @@
     // Special treatment for an FP function which returns its result in st(0).
     // If Dest ends up being a physical xmm register, the fstp emit code will
     // route st(0) through the space reserved in the function argument area
     // we allocated.
     _fstp(Dest);
     // Create a fake use of Dest in case it actually isn't used, because st(0)
     // still needs to be popped.
     Context.insert(InstFakeUse::create(Func, Dest));
   }
 
-  // Add the appropriate offset to esp.
-  if (ParameterAreaSizeBytes)
-    _adjust_stack(-ParameterAreaSizeBytes);
-
   // Generate a FakeUse to keep the call live if necessary.
   if (Instr->hasSideEffects() && ReturnReg) {
     Inst *FakeUse = InstFakeUse::create(Func, ReturnReg);
     Context.insert(FakeUse);
   }
 
   if (!Dest)
     return;
 
   // Assign the result of the call to Dest.
@@ skipping 92 matching lines @@
   // | 4. global spill area   |
   // +------------------------+
   // | 5. padding             |
   // +------------------------+
   // | 6. local spill area    |
   // +------------------------+
   // | 7. padding             |
   // +------------------------+
   // | 8. allocas             |
   // +------------------------+
+  // | 9. padding             |
+  // +------------------------+
+  // | 10. out args           |
+  // +------------------------+ <--- StackPointer
   //
   // The following variables record the size in bytes of the given areas:
   //  * X86_RET_IP_SIZE_BYTES:  area 1
   //  * PreservedRegsSizeBytes: area 2
   //  * SpillAreaPaddingBytes:  area 3
   //  * GlobalsSize:            area 4
   //  * GlobalsAndSubsequentPaddingSize: areas 4 - 5
   //  * LocalsSpillAreaSize:    area 6
-  //  * SpillAreaSizeBytes:     areas 3 - 7
+  //  * SpillAreaSizeBytes:     areas 3 - 10
+  //  * maxOutArgsSizeBytes():  area 10
 
   // Determine stack frame offsets for each Variable without a register
   // assignment. This can be done as one variable per stack slot. Or, do
   // coalescing by running the register allocator again with an infinite set of
   // registers (as a side effect, this gives variables a second chance at
   // physical register assignment).
   //
   // A middle ground approach is to leverage sparsity and allocate one block of
   // space on the frame for globals (variables with multi-block lifetime), and
   // one block to share for locals (single-block lifetime).
@@ skipping 90 matching lines @@
   // space on the stack for this.
   const Type ReturnType = Func->getReturnType();
   if (isScalarFloatingType(ReturnType)) {
     // Avoid misaligned double-precicion load/store.
     NeedsStackAlignment = true;
     SpillAreaSizeBytes =
         std::max(typeWidthInBytesOnStack(ReturnType), SpillAreaSizeBytes);
   }
 
   // Align esp if necessary.
-  if (NeedsStackAlignment) {
+  if (!NeedsStackAlignment) {

[Jim Stichnoth, 2015/11/26 18:32:06]

Instead of "if (!c) a; else b;", use "if (c) b; else a;".

Same for the x8664 file.

[sehr, 2015/11/26 21:09:23]

I did it to parallel ARM.  I fixed that also.

+    SpillAreaSizeBytes += maxOutArgsSizeBytes();
+  } else {
     uint32_t StackOffset =
         Traits::X86_RET_IP_SIZE_BYTES + PreservedRegsSizeBytes;
     uint32_t StackSize =
         Traits::applyStackAlignment(StackOffset + SpillAreaSizeBytes);
+    StackSize = Traits::applyStackAlignment(StackSize + maxOutArgsSizeBytes());
     SpillAreaSizeBytes = StackSize - StackOffset;
   }
 
   // Combine fixed allocations into SpillAreaSizeBytes if we are emitting the
   // fixed allocations in the prolog.
   if (PrologEmitsFixedAllocas)
     SpillAreaSizeBytes += FixedAllocaSizeBytes;
   if (SpillAreaSizeBytes) {
     // Generate "sub esp, SpillAreaSizeBytes"
     _sub(getPhysicalRegister(Traits::RegisterSet::Reg_esp),
          Ctx->getConstantInt32(SpillAreaSizeBytes));
     // If the fixed allocas are aligned more than the stack frame, align the
     // stack pointer accordingly.
     if (PrologEmitsFixedAllocas &&
         FixedAllocaAlignBytes > Traits::X86_STACK_ALIGNMENT_BYTES) {
       assert(IsEbpBasedFrame);
       _and(getPhysicalRegister(Traits::RegisterSet::Reg_esp),
            Ctx->getConstantInt32(-FixedAllocaAlignBytes));
     }
   }
 
   // Account for known-frame-offset alloca instructions that were not already
   // combined into the prolog.
   if (!PrologEmitsFixedAllocas)
     SpillAreaSizeBytes += FixedAllocaSizeBytes;
 
   Ctx->statsUpdateFrameBytes(SpillAreaSizeBytes);
 
-  // Initialize the stack adjustment so that after all the known-frame-offset
-  // alloca instructions are emitted, the stack adjustment will reach zero.
-  resetStackAdjustment();
-  if (!PrologEmitsFixedAllocas)
-    updateStackAdjustment(-FixedAllocaSizeBytes);
-
   // Fill in stack offsets for stack args, and copy args into registers for
   // those that were register-allocated. Args are pushed right to left, so
   // Arg[0] is closest to the stack/frame pointer.
   Variable *FramePtr = getPhysicalRegister(getFrameOrStackReg());
   size_t BasicFrameOffset =
       PreservedRegsSizeBytes + Traits::X86_RET_IP_SIZE_BYTES;
   if (!IsEbpBasedFrame)
     BasicFrameOffset += SpillAreaSizeBytes;
 
   const VarList &Args = Func->getArgs();
@@ skipping 30 matching lines @@
   }
   this->HasComputedFrame = true;
 
   if (BuildDefs::dump() && Func->isVerbose(IceV_Frame)) {
     OstreamLocker L(Func->getContext());
     Ostream &Str = Func->getContext()->getStrDump();
 
     Str << "Stack layout:\n";
     uint32_t EspAdjustmentPaddingSize =
         SpillAreaSizeBytes - LocalsSpillAreaSize -
-        GlobalsAndSubsequentPaddingSize - SpillAreaPaddingBytes;
+        GlobalsAndSubsequentPaddingSize - SpillAreaPaddingBytes -
+        maxOutArgsSizeBytes();
     Str << " in-args = " << InArgsSizeBytes << " bytes\n"
         << " return address = " << Traits::X86_RET_IP_SIZE_BYTES << " bytes\n"
         << " preserved registers = " << PreservedRegsSizeBytes << " bytes\n"
         << " spill area padding = " << SpillAreaPaddingBytes << " bytes\n"
         << " globals spill area = " << GlobalsSize << " bytes\n"
         << " globals-locals spill areas intermediate padding = "
         << GlobalsAndSubsequentPaddingSize - GlobalsSize << " bytes\n"
         << " locals spill area = " << LocalsSpillAreaSize << " bytes\n"
         << " esp alignment padding = " << EspAdjustmentPaddingSize
         << " bytes\n";
 
     Str << "Stack details:\n"
         << " esp adjustment = " << SpillAreaSizeBytes << " bytes\n"
         << " spill area alignment = " << SpillAreaAlignmentBytes << " bytes\n"
+        << " outgoing args size = " << maxOutArgsSizeBytes() << " bytes\n"
         << " locals spill area alignment = " << LocalsSlotsAlignmentBytes
         << " bytes\n"
         << " is ebp based = " << IsEbpBasedFrame << "\n";
   }
 }
 
 void TargetX8632::addEpilog(CfgNode *Node) {
   InstList &Insts = Node->getInsts();
   InstList::reverse_iterator RI, E;
   for (RI = Insts.rbegin(), E = Insts.rend(); RI != E; ++RI) {
@@ skipping 379 matching lines @@
 // case the high-level table has extra entries.
 #define X(tag, sizeLog2, align, elts, elty, str)                               \
   static_assert(_table1_##tag == _table2_##tag,                                \
                 "Inconsistency between ICETYPEX8632_TABLE and ICETYPE_TABLE");
 ICETYPE_TABLE
 #undef X
 } // end of namespace dummy3
 } // end of anonymous namespace
 
 } // end of namespace Ice