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Side by Side Diff: tests_lit/llvm2ice_tests/fused-alloca-arg.ll

Issue 1472623002: Unify alloca, outgoing arg, and prolog construction (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Code review fixes. Also removed StackAdjustment. Created 5 years ago
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1 ; This is a basic test of the alloca instruction and a call. 1 ; This is a basic test of the alloca instruction and a call.
2 2
3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
4 ; RUN: --target x8632 -i %s --args -O2 -allow-externally-defined-symbols \ 4 ; RUN: --target x8632 -i %s --args -O2 -allow-externally-defined-symbols \
5 ; RUN: | %if --need=target_X8632 --command FileCheck %s 5 ; RUN: | %if --need=target_X8632 --command FileCheck %s
6 6
7 declare void @copy(i32 %arg1, i8* %arr1, i8* %arr2, i8* %arr3, i8* %arr4); 7 declare void @copy(i32 %arg1, i8* %arr1, i8* %arr2, i8* %arr3, i8* %arr4);
8 8
9 ; Test that alloca base addresses get passed correctly to functions. 9 ; Test that alloca base addresses get passed correctly to functions.
10 define internal void @caller1(i32 %arg) { 10 define internal void @caller1(i32 %arg) {
11 entry: 11 entry:
12 %a1 = alloca i8, i32 32, align 4 12 %a1 = alloca i8, i32 32, align 4
13 %p1 = bitcast i8* %a1 to i32* 13 %p1 = bitcast i8* %a1 to i32*
14 store i32 %arg, i32* %p1, align 1 14 store i32 %arg, i32* %p1, align 1
15 call void @copy(i32 %arg, i8* %a1, i8* %a1, i8* %a1, i8* %a1) 15 call void @copy(i32 %arg, i8* %a1, i8* %a1, i8* %a1, i8* %a1)
16 ret void 16 ret void
17 } 17 }
18 18
19 ; CHECK-LABEL: caller1 19 ; CHECK-LABEL: caller1
20 ; CHECK-NEXT: sub esp,0x2c 20 ; CHECK-NEXT: sub esp,0x4c
21 ; CHECK-NEXT: mov eax,DWORD PTR [esp+0x30] 21 ; CHECK-NEXT: mov eax,DWORD PTR [esp+0x50]
22 ; CHECK-NEXT: mov DWORD PTR [esp],eax 22 ; CHECK-NEXT: mov DWORD PTR [esp+0x20],eax
23 ; CHECK-NEXT: sub esp,0x20
24 ; CHECK-NEXT: mov DWORD PTR [esp],eax 23 ; CHECK-NEXT: mov DWORD PTR [esp],eax
25 ; CHECK-NEXT: lea eax,[esp+0x20] 24 ; CHECK-NEXT: lea eax,[esp+0x20]
26 ; CHECK-NEXT: mov DWORD PTR [esp+0x4],eax 25 ; CHECK-NEXT: mov DWORD PTR [esp+0x4],eax
27 ; CHECK-NEXT: lea eax,[esp+0x20] 26 ; CHECK-NEXT: lea eax,[esp+0x20]
28 ; CHECK-NEXT: mov DWORD PTR [esp+0x8],eax 27 ; CHECK-NEXT: mov DWORD PTR [esp+0x8],eax
29 ; CHECK-NEXT: lea eax,[esp+0x20] 28 ; CHECK-NEXT: lea eax,[esp+0x20]
30 ; CHECK-NEXT: mov DWORD PTR [esp+0xc],eax 29 ; CHECK-NEXT: mov DWORD PTR [esp+0xc],eax
31 ; CHECK-NEXT: lea eax,[esp+0x20] 30 ; CHECK-NEXT: lea eax,[esp+0x20]
32 ; CHECK-NEXT: mov DWORD PTR [esp+0x10],eax 31 ; CHECK-NEXT: mov DWORD PTR [esp+0x10],eax
33 ; CHECK-NEXT: call 32 ; CHECK-NEXT: call
34 ; CHECK-NEXT: add esp,0x20 33 ; CHECK-NEXT: add esp,0x4c
35 ; CHECK-NEXT: add esp,0x2c
36 ; CHECK-NEXT: ret 34 ; CHECK-NEXT: ret
37 35
38 ; Test that alloca base addresses get passed correctly to functions. 36 ; Test that alloca base addresses get passed correctly to functions.
39 define internal void @caller2(i32 %arg) { 37 define internal void @caller2(i32 %arg) {
40 entry: 38 entry:
41 %a1 = alloca i8, i32 32, align 4 39 %a1 = alloca i8, i32 32, align 4
42 %a2 = alloca i8, i32 32, align 4 40 %a2 = alloca i8, i32 32, align 4
43 %p1 = bitcast i8* %a1 to i32* 41 %p1 = bitcast i8* %a1 to i32*
44 %p2 = bitcast i8* %a2 to i32* 42 %p2 = bitcast i8* %a2 to i32*
45 store i32 %arg, i32* %p1, align 1 43 store i32 %arg, i32* %p1, align 1
46 store i32 %arg, i32* %p2, align 1 44 store i32 %arg, i32* %p2, align 1
47 call void @copy(i32 %arg, i8* %a1, i8* %a2, i8* %a1, i8* %a2) 45 call void @copy(i32 %arg, i8* %a1, i8* %a2, i8* %a1, i8* %a2)
48 ret void 46 ret void
49 } 47 }
50 48
51 ; CHECK-LABEL: caller2 49 ; CHECK-LABEL: caller2
52 ; CHECK-NEXT: sub esp,0x4c 50 ; CHECK-NEXT: sub esp,0x6c
53 ; CHECK-NEXT: mov eax,DWORD PTR [esp+0x50] 51 ; CHECK-NEXT: mov eax,DWORD PTR [esp+0x70]
54 ; CHECK-NEXT: mov DWORD PTR [esp],eax
55 ; CHECK-NEXT: mov DWORD PTR [esp+0x20],eax 52 ; CHECK-NEXT: mov DWORD PTR [esp+0x20],eax
56 ; CHECK-NEXT: sub esp,0x20 53 ; CHECK-NEXT: mov DWORD PTR [esp+0x40],eax
57 ; CHECK-NEXT: mov DWORD PTR [esp],eax 54 ; CHECK-NEXT: mov DWORD PTR [esp],eax
58 ; CHECK-NEXT: lea eax,[esp+0x20] 55 ; CHECK-NEXT: lea eax,[esp+0x20]
59 ; CHECK-NEXT: mov DWORD PTR [esp+0x4],eax 56 ; CHECK-NEXT: mov DWORD PTR [esp+0x4],eax
60 ; CHECK-NEXT: lea eax,[esp+0x40] 57 ; CHECK-NEXT: lea eax,[esp+0x40]
61 ; CHECK-NEXT: mov DWORD PTR [esp+0x8],eax 58 ; CHECK-NEXT: mov DWORD PTR [esp+0x8],eax
62 ; CHECK-NEXT: lea eax,[esp+0x20] 59 ; CHECK-NEXT: lea eax,[esp+0x20]
63 ; CHECK-NEXT: mov DWORD PTR [esp+0xc],eax 60 ; CHECK-NEXT: mov DWORD PTR [esp+0xc],eax
64 ; CHECK-NEXT: lea eax,[esp+0x40] 61 ; CHECK-NEXT: lea eax,[esp+0x40]
65 ; CHECK-NEXT: mov DWORD PTR [esp+0x10],eax 62 ; CHECK-NEXT: mov DWORD PTR [esp+0x10],eax
66 ; CHECK-NEXT: call 63 ; CHECK-NEXT: call
67 ; CHECK-NEXT: add esp,0x20 64 ; CHECK-NEXT: add esp,0x6c
68 ; CHECK-NEXT: add esp,0x4c
69 ; CHECK-NEXT: ret 65 ; CHECK-NEXT: ret
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