Unify alloca, outgoing arg, and prolog construction

src/IceInstX8632.cpp

 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 81 matching lines @@
     SizeT I = 0;
     if (Base)
       Vars[I++] = Base;
     if (Index)
       Vars[I++] = Index;
     assert(I == NumVars);
   }
 }
 
 namespace {
-static int32_t GetRematerializableOffset(Variable *Var, bool IgnoreStackAdjust,
+static int32_t GetRematerializableOffset(Variable *Var,
                                          const Ice::TargetX8632 *Target) {
-  int32_t Disp = 0;
-  Disp += Var->getStackOffset();
+  int32_t Disp = Var->getStackOffset();
   SizeT RegNum = static_cast<SizeT>(Var->getRegNum());
-  if (RegNum == Target->getStackReg()) {
-    if (!IgnoreStackAdjust)
-      Disp += Target->getStackAdjustment();
-  } else if (RegNum == Target->getFrameReg()) {
+  if (RegNum == Target->getFrameReg()) {
     Disp += Target->getFrameFixedAllocaOffset();
-  } else {
+  } else if (RegNum != Target->getStackReg()) {
     llvm::report_fatal_error("Unexpected rematerializable register type");
   }
   return Disp;
 }
 } // end of anonymous namespace
 
 void MachineTraits<TargetX8632>::X86OperandMem::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   const auto *Target = static_cast<const Ice::TargetX8632 *>(Func->getTarget());
   // If the base is rematerializable, we need to replace it with the correct
   // physical register (esp or ebp), and update the Offset.
   int32_t Disp = 0;
   if (getBase() && getBase()->isRematerializable()) {
-    Disp +=
-        GetRematerializableOffset(getBase(), getIgnoreStackAdjust(), Target);
+    Disp += GetRematerializableOffset(getBase(), Target);
   }
   // The index should never be rematerializable.  But if we ever allow it, then
   // we should make sure the rematerialization offset is shifted by the Shift
   // value.
   if (getIndex())
     assert(!getIndex()->isRematerializable());
   Ostream &Str = Func->getContext()->getStrEmit();
   if (SegmentReg != DefaultSegment) {
     assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM);
     Str << "%" << X8632::Traits::InstSegmentRegNames[SegmentReg] << ":";
@@ skipping 38 matching lines @@
     return;
   if (SegmentReg != DefaultSegment) {
     assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM);
     Str << X8632::Traits::InstSegmentRegNames[SegmentReg] << ":";
   }
   bool Dumped = false;
   Str << "[";
   int32_t Disp = 0;
   const auto *Target = static_cast<const Ice::TargetX8632 *>(Func->getTarget());
   if (getBase() && getBase()->isRematerializable()) {
-    Disp +=
-        GetRematerializableOffset(getBase(), getIgnoreStackAdjust(), Target);
+    Disp += GetRematerializableOffset(getBase(), Target);
   }
   if (getBase()) {
     if (Func)
       getBase()->dump(Func);
     else
       getBase()->dump(Str);
     Dumped = true;
   }
   if (getIndex()) {
     assert(!getIndex()->isRematerializable());
@@ skipping 45 matching lines @@
   }
 }
 
 MachineTraits<TargetX8632>::Address
 MachineTraits<TargetX8632>::X86OperandMem::toAsmAddress(
     MachineTraits<TargetX8632>::Assembler *Asm,
     const Ice::TargetLowering *TargetLowering) const {
   int32_t Disp = 0;
   const auto *Target = static_cast<const Ice::TargetX8632 *>(TargetLowering);
   if (getBase() && getBase()->isRematerializable()) {
-    Disp +=
-        GetRematerializableOffset(getBase(), getIgnoreStackAdjust(), Target);
+    Disp += GetRematerializableOffset(getBase(), Target);
   }
   // The index should never be rematerializable.  But if we ever allow it, then
   // we should make sure the rematerialization offset is shifted by the Shift
   // value.
   if (getIndex())
     assert(!getIndex()->isRematerializable());
   AssemblerFixup *Fixup = nullptr;
   // Determine the offset (is it relocatable?)
   if (getOffset()) {
     if (const auto *CI = llvm::dyn_cast<ConstantInteger32>(getOffset())) {
@@ skipping 22 matching lines @@
                                   Fixup);
   } else {
     return X8632::Traits::Address(Disp, Fixup);
   }
 }
 
 MachineTraits<TargetX8632>::Address
 MachineTraits<TargetX8632>::VariableSplit::toAsmAddress(const Cfg *Func) const {
   assert(!Var->hasReg());
   const ::Ice::TargetLowering *Target = Func->getTarget();
-  int32_t Offset =
-      Var->getStackOffset() + Target->getStackAdjustment() + getOffset();
+  int32_t Offset = Var->getStackOffset() + getOffset();
   return X8632::Traits::Address(getEncodedGPR(Target->getFrameOrStackReg()),
                                 Offset, AssemblerFixup::NoFixup);
 }
 
 void MachineTraits<TargetX8632>::VariableSplit::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(!Var->hasReg());
   // The following is copied/adapted from TargetX8632::emitVariable().
   const ::Ice::TargetLowering *Target = Func->getTarget();
   constexpr Type Ty = IceType_i32;
-  int32_t Offset =
-      Var->getStackOffset() + Target->getStackAdjustment() + getOffset();
+  int32_t Offset = Var->getStackOffset() + getOffset();
   if (Offset)
     Str << Offset;
   Str << "(%" << Target->getRegName(Target->getFrameOrStackReg(), Ty) << ")";
 }
 
 void MachineTraits<TargetX8632>::VariableSplit::dump(const Cfg *Func,
                                                      Ostream &Str) const {
   if (!BuildDefs::dump())
     return;
   switch (Part) {
   case Low:
     Str << "low";
     break;
   case High:
     Str << "high";
     break;
   }
   Str << "(";
   if (Func)
     Var->dump(Func);
   else
     Var->dump(Str);
   Str << ")";
 }
 
 } // namespace X86Internal
 } // end of namespace Ice
 
 X86INSTS_DEFINE_STATIC_DATA(TargetX8632)