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Issue 1468073004: Reshuffle registers in JSConstructStub to avoid trashing costructor and new.target on fast path (so… (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <limits.h> // For LONG_MIN, LONG_MAX. 5 #include <limits.h> // For LONG_MIN, LONG_MAX.
6 6
7 #if V8_TARGET_ARCH_ARM 7 #if V8_TARGET_ARCH_ARM
8 8
9 #include "src/base/bits.h" 9 #include "src/base/bits.h"
10 #include "src/base/division-by-constant.h" 10 #include "src/base/division-by-constant.h"
(...skipping 1634 matching lines...) Expand 10 before | Expand all | Expand 10 after
1645 if (emit_debug_code()) { 1645 if (emit_debug_code()) {
1646 // Trash the registers to simulate an allocation failure. 1646 // Trash the registers to simulate an allocation failure.
1647 mov(result, Operand(0x7091)); 1647 mov(result, Operand(0x7091));
1648 mov(scratch1, Operand(0x7191)); 1648 mov(scratch1, Operand(0x7191));
1649 mov(scratch2, Operand(0x7291)); 1649 mov(scratch2, Operand(0x7291));
1650 } 1650 }
1651 jmp(gc_required); 1651 jmp(gc_required);
1652 return; 1652 return;
1653 } 1653 }
1654 1654
1655 DCHECK(!result.is(scratch1)); 1655 DCHECK(!AreAliased(result, scratch1, scratch2, ip));
1656 DCHECK(!result.is(scratch2));
1657 DCHECK(!scratch1.is(scratch2));
1658 DCHECK(!scratch1.is(ip));
1659 DCHECK(!scratch2.is(ip));
1660 1656
1661 // Make object size into bytes. 1657 // Make object size into bytes.
1662 if ((flags & SIZE_IN_WORDS) != 0) { 1658 if ((flags & SIZE_IN_WORDS) != 0) {
1663 object_size *= kPointerSize; 1659 object_size *= kPointerSize;
1664 } 1660 }
1665 DCHECK_EQ(0, object_size & kObjectAlignmentMask); 1661 DCHECK_EQ(0, object_size & kObjectAlignmentMask);
1666 1662
1667 // Check relative positions of allocation top and limit addresses. 1663 // Check relative positions of allocation top and limit addresses.
1668 // The values must be adjacent in memory to allow the use of LDM. 1664 // The values must be adjacent in memory to allow the use of LDM.
1669 // Also, assert that the registers are numbered such that the values 1665 // Also, assert that the registers are numbered such that the values
1670 // are loaded in the correct order. 1666 // are loaded in the correct order.
1671 ExternalReference allocation_top = 1667 ExternalReference allocation_top =
1672 AllocationUtils::GetAllocationTopReference(isolate(), flags); 1668 AllocationUtils::GetAllocationTopReference(isolate(), flags);
1673 ExternalReference allocation_limit = 1669 ExternalReference allocation_limit =
1674 AllocationUtils::GetAllocationLimitReference(isolate(), flags); 1670 AllocationUtils::GetAllocationLimitReference(isolate(), flags);
1675 1671
1676 intptr_t top = 1672 intptr_t top = reinterpret_cast<intptr_t>(allocation_top.address());
1677 reinterpret_cast<intptr_t>(allocation_top.address()); 1673 intptr_t limit = reinterpret_cast<intptr_t>(allocation_limit.address());
1678 intptr_t limit =
1679 reinterpret_cast<intptr_t>(allocation_limit.address());
1680 DCHECK((limit - top) == kPointerSize); 1674 DCHECK((limit - top) == kPointerSize);
1681 DCHECK(result.code() < ip.code()); 1675 DCHECK(result.code() < ip.code());
1682 1676
1683 // Set up allocation top address register. 1677 // Set up allocation top address register.
1684 Register topaddr = scratch1; 1678 Register top_address = scratch1;
1685 mov(topaddr, Operand(allocation_top));
1686
1687 // This code stores a temporary value in ip. This is OK, as the code below 1679 // This code stores a temporary value in ip. This is OK, as the code below
1688 // does not need ip for implicit literal generation. 1680 // does not need ip for implicit literal generation.
1681 Register alloc_limit = ip;
1682 Register result_end = scratch2;
1683 mov(top_address, Operand(allocation_top));
1684
1689 if ((flags & RESULT_CONTAINS_TOP) == 0) { 1685 if ((flags & RESULT_CONTAINS_TOP) == 0) {
1690 // Load allocation top into result and allocation limit into ip. 1686 // Load allocation top into result and allocation limit into alloc_limit.
1691 ldm(ia, topaddr, result.bit() | ip.bit()); 1687 ldm(ia, top_address, result.bit() | alloc_limit.bit());
1692 } else { 1688 } else {
1693 if (emit_debug_code()) { 1689 if (emit_debug_code()) {
1694 // Assert that result actually contains top on entry. ip is used 1690 // Assert that result actually contains top on entry.
1695 // immediately below so this use of ip does not cause difference with 1691 ldr(alloc_limit, MemOperand(top_address));
1696 // respect to register content between debug and release mode. 1692 cmp(result, alloc_limit);
1697 ldr(ip, MemOperand(topaddr));
1698 cmp(result, ip);
1699 Check(eq, kUnexpectedAllocationTop); 1693 Check(eq, kUnexpectedAllocationTop);
1700 } 1694 }
1701 // Load allocation limit into ip. Result already contains allocation top. 1695 // Load allocation limit. Result already contains allocation top.
1702 ldr(ip, MemOperand(topaddr, limit - top)); 1696 ldr(alloc_limit, MemOperand(top_address, limit - top));
1703 } 1697 }
1704 1698
1705 if ((flags & DOUBLE_ALIGNMENT) != 0) { 1699 if ((flags & DOUBLE_ALIGNMENT) != 0) {
1706 // Align the next allocation. Storing the filler map without checking top is 1700 // Align the next allocation. Storing the filler map without checking top is
1707 // safe in new-space because the limit of the heap is aligned there. 1701 // safe in new-space because the limit of the heap is aligned there.
1708 STATIC_ASSERT(kPointerAlignment * 2 == kDoubleAlignment); 1702 STATIC_ASSERT(kPointerAlignment * 2 == kDoubleAlignment);
1709 and_(scratch2, result, Operand(kDoubleAlignmentMask), SetCC); 1703 and_(result_end, result, Operand(kDoubleAlignmentMask), SetCC);
1710 Label aligned; 1704 Label aligned;
1711 b(eq, &aligned); 1705 b(eq, &aligned);
1712 if ((flags & PRETENURE) != 0) { 1706 if ((flags & PRETENURE) != 0) {
1713 cmp(result, Operand(ip)); 1707 cmp(result, Operand(alloc_limit));
1714 b(hs, gc_required); 1708 b(hs, gc_required);
1715 } 1709 }
1716 mov(scratch2, Operand(isolate()->factory()->one_pointer_filler_map())); 1710 mov(result_end, Operand(isolate()->factory()->one_pointer_filler_map()));
1717 str(scratch2, MemOperand(result, kDoubleSize / 2, PostIndex)); 1711 str(result_end, MemOperand(result, kDoubleSize / 2, PostIndex));
1718 bind(&aligned); 1712 bind(&aligned);
1719 } 1713 }
1720 1714
1721 // Calculate new top and bail out if new space is exhausted. Use result 1715 // Calculate new top and bail out if new space is exhausted. Use result
1722 // to calculate the new top. We must preserve the ip register at this 1716 // to calculate the new top. We must preserve the ip register at this
1723 // point, so we cannot just use add(). 1717 // point, so we cannot just use add().
1724 DCHECK(object_size > 0); 1718 DCHECK(object_size > 0);
1725 Register source = result; 1719 Register source = result;
1726 Condition cond = al; 1720 Condition cond = al;
1727 int shift = 0; 1721 int shift = 0;
1728 while (object_size != 0) { 1722 while (object_size != 0) {
1729 if (((object_size >> shift) & 0x03) == 0) { 1723 if (((object_size >> shift) & 0x03) == 0) {
1730 shift += 2; 1724 shift += 2;
1731 } else { 1725 } else {
1732 int bits = object_size & (0xff << shift); 1726 int bits = object_size & (0xff << shift);
1733 object_size -= bits; 1727 object_size -= bits;
1734 shift += 8; 1728 shift += 8;
1735 Operand bits_operand(bits); 1729 Operand bits_operand(bits);
1736 DCHECK(bits_operand.instructions_required(this) == 1); 1730 DCHECK(bits_operand.instructions_required(this) == 1);
1737 add(scratch2, source, bits_operand, SetCC, cond); 1731 add(result_end, source, bits_operand, SetCC, cond);
1738 source = scratch2; 1732 source = result_end;
1739 cond = cc; 1733 cond = cc;
1740 } 1734 }
1741 } 1735 }
1742 b(cs, gc_required); 1736 b(cs, gc_required);
1743 cmp(scratch2, Operand(ip)); 1737 cmp(result_end, Operand(alloc_limit));
1744 b(hi, gc_required); 1738 b(hi, gc_required);
1745 str(scratch2, MemOperand(topaddr)); 1739 str(result_end, MemOperand(top_address));
1746 1740
1747 // Tag object if requested. 1741 // Tag object if requested.
1748 if ((flags & TAG_OBJECT) != 0) { 1742 if ((flags & TAG_OBJECT) != 0) {
1749 add(result, result, Operand(kHeapObjectTag)); 1743 add(result, result, Operand(kHeapObjectTag));
1750 } 1744 }
1751 } 1745 }
1752 1746
1753 1747
1754 void MacroAssembler::Allocate(Register object_size, Register result, 1748 void MacroAssembler::Allocate(Register object_size, Register result,
1755 Register result_end, Register scratch, 1749 Register result_end, Register scratch,
1756 Label* gc_required, AllocationFlags flags) { 1750 Label* gc_required, AllocationFlags flags) {
1757 if (!FLAG_inline_new) { 1751 if (!FLAG_inline_new) {
1758 if (emit_debug_code()) { 1752 if (emit_debug_code()) {
1759 // Trash the registers to simulate an allocation failure. 1753 // Trash the registers to simulate an allocation failure.
1760 mov(result, Operand(0x7091)); 1754 mov(result, Operand(0x7091));
1761 mov(scratch, Operand(0x7191)); 1755 mov(scratch, Operand(0x7191));
1762 mov(result_end, Operand(0x7291)); 1756 mov(result_end, Operand(0x7291));
1763 } 1757 }
1764 jmp(gc_required); 1758 jmp(gc_required);
1765 return; 1759 return;
1766 } 1760 }
1767 1761
1768 // Assert that the register arguments are different and that none of 1762 // |object_size| and |result_end| may overlap if the DOUBLE_ALIGNMENT flag
1769 // them are ip. ip is used explicitly in the code generated below. 1763 // is not specified. Other registers must not overlap.
1770 DCHECK(!result.is(scratch)); 1764 DCHECK(!AreAliased(object_size, result, scratch, ip));
1771 DCHECK(!result.is(result_end)); 1765 DCHECK(!AreAliased(result_end, result, scratch, ip));
1772 DCHECK(!scratch.is(result_end)); 1766 DCHECK((flags & DOUBLE_ALIGNMENT) == 0 || !object_size.is(result_end));
1773 DCHECK(!object_size.is(ip));
1774 DCHECK(!result.is(ip));
1775 DCHECK(!scratch.is(ip));
1776 DCHECK(!result_end.is(ip));
1777 1767
1778 // Check relative positions of allocation top and limit addresses. 1768 // Check relative positions of allocation top and limit addresses.
1779 // The values must be adjacent in memory to allow the use of LDM. 1769 // The values must be adjacent in memory to allow the use of LDM.
1780 // Also, assert that the registers are numbered such that the values 1770 // Also, assert that the registers are numbered such that the values
1781 // are loaded in the correct order. 1771 // are loaded in the correct order.
1782 ExternalReference allocation_top = 1772 ExternalReference allocation_top =
1783 AllocationUtils::GetAllocationTopReference(isolate(), flags); 1773 AllocationUtils::GetAllocationTopReference(isolate(), flags);
1784 ExternalReference allocation_limit = 1774 ExternalReference allocation_limit =
1785 AllocationUtils::GetAllocationLimitReference(isolate(), flags); 1775 AllocationUtils::GetAllocationLimitReference(isolate(), flags);
1786 intptr_t top = 1776 intptr_t top = reinterpret_cast<intptr_t>(allocation_top.address());
1787 reinterpret_cast<intptr_t>(allocation_top.address()); 1777 intptr_t limit = reinterpret_cast<intptr_t>(allocation_limit.address());
1788 intptr_t limit =
1789 reinterpret_cast<intptr_t>(allocation_limit.address());
1790 DCHECK((limit - top) == kPointerSize); 1778 DCHECK((limit - top) == kPointerSize);
1791 DCHECK(result.code() < ip.code()); 1779 DCHECK(result.code() < ip.code());
1792 1780
1793 // Set up allocation top address. 1781 // Set up allocation top address and allocation limit registers.
1794 Register topaddr = scratch; 1782 Register top_address = scratch;
1795 mov(topaddr, Operand(allocation_top));
1796
1797 // This code stores a temporary value in ip. This is OK, as the code below 1783 // This code stores a temporary value in ip. This is OK, as the code below
1798 // does not need ip for implicit literal generation. 1784 // does not need ip for implicit literal generation.
1785 Register alloc_limit = ip;
1786 mov(top_address, Operand(allocation_top));
1787
1799 if ((flags & RESULT_CONTAINS_TOP) == 0) { 1788 if ((flags & RESULT_CONTAINS_TOP) == 0) {
1800 // Load allocation top into result and allocation limit into ip. 1789 // Load allocation top into result and allocation limit into alloc_limit.
1801 ldm(ia, topaddr, result.bit() | ip.bit()); 1790 ldm(ia, top_address, result.bit() | alloc_limit.bit());
1802 } else { 1791 } else {
1803 if (emit_debug_code()) { 1792 if (emit_debug_code()) {
1804 // Assert that result actually contains top on entry. ip is used 1793 // Assert that result actually contains top on entry.
1805 // immediately below so this use of ip does not cause difference with 1794 ldr(alloc_limit, MemOperand(top_address));
1806 // respect to register content between debug and release mode. 1795 cmp(result, alloc_limit);
1807 ldr(ip, MemOperand(topaddr));
1808 cmp(result, ip);
1809 Check(eq, kUnexpectedAllocationTop); 1796 Check(eq, kUnexpectedAllocationTop);
1810 } 1797 }
1811 // Load allocation limit into ip. Result already contains allocation top. 1798 // Load allocation limit. Result already contains allocation top.
1812 ldr(ip, MemOperand(topaddr, limit - top)); 1799 ldr(alloc_limit, MemOperand(top_address, limit - top));
1813 } 1800 }
1814 1801
1815 if ((flags & DOUBLE_ALIGNMENT) != 0) { 1802 if ((flags & DOUBLE_ALIGNMENT) != 0) {
1816 // Align the next allocation. Storing the filler map without checking top is 1803 // Align the next allocation. Storing the filler map without checking top is
1817 // safe in new-space because the limit of the heap is aligned there. 1804 // safe in new-space because the limit of the heap is aligned there.
1818 DCHECK(kPointerAlignment * 2 == kDoubleAlignment); 1805 DCHECK(kPointerAlignment * 2 == kDoubleAlignment);
1819 and_(result_end, result, Operand(kDoubleAlignmentMask), SetCC); 1806 and_(result_end, result, Operand(kDoubleAlignmentMask), SetCC);
1820 Label aligned; 1807 Label aligned;
1821 b(eq, &aligned); 1808 b(eq, &aligned);
1822 if ((flags & PRETENURE) != 0) { 1809 if ((flags & PRETENURE) != 0) {
1823 cmp(result, Operand(ip)); 1810 cmp(result, Operand(alloc_limit));
1824 b(hs, gc_required); 1811 b(hs, gc_required);
1825 } 1812 }
1826 mov(result_end, Operand(isolate()->factory()->one_pointer_filler_map())); 1813 mov(result_end, Operand(isolate()->factory()->one_pointer_filler_map()));
1827 str(result_end, MemOperand(result, kDoubleSize / 2, PostIndex)); 1814 str(result_end, MemOperand(result, kDoubleSize / 2, PostIndex));
1828 bind(&aligned); 1815 bind(&aligned);
1829 } 1816 }
1830 1817
1831 // Calculate new top and bail out if new space is exhausted. Use result 1818 // Calculate new top and bail out if new space is exhausted. Use result
1832 // to calculate the new top. Object size may be in words so a shift is 1819 // to calculate the new top. Object size may be in words so a shift is
1833 // required to get the number of bytes. 1820 // required to get the number of bytes.
1834 if ((flags & SIZE_IN_WORDS) != 0) { 1821 if ((flags & SIZE_IN_WORDS) != 0) {
1835 add(result_end, result, Operand(object_size, LSL, kPointerSizeLog2), SetCC); 1822 add(result_end, result, Operand(object_size, LSL, kPointerSizeLog2), SetCC);
1836 } else { 1823 } else {
1837 add(result_end, result, Operand(object_size), SetCC); 1824 add(result_end, result, Operand(object_size), SetCC);
1838 } 1825 }
1839 b(cs, gc_required); 1826 b(cs, gc_required);
1840 cmp(result_end, Operand(ip)); 1827 cmp(result_end, Operand(alloc_limit));
1841 b(hi, gc_required); 1828 b(hi, gc_required);
1842 1829
1843 // Update allocation top. result temporarily holds the new top. 1830 // Update allocation top. result temporarily holds the new top.
1844 if (emit_debug_code()) { 1831 if (emit_debug_code()) {
1845 tst(result_end, Operand(kObjectAlignmentMask)); 1832 tst(result_end, Operand(kObjectAlignmentMask));
1846 Check(eq, kUnalignedAllocationInNewSpace); 1833 Check(eq, kUnalignedAllocationInNewSpace);
1847 } 1834 }
1848 str(result_end, MemOperand(topaddr)); 1835 str(result_end, MemOperand(top_address));
1849 1836
1850 // Tag object if requested. 1837 // Tag object if requested.
1851 if ((flags & TAG_OBJECT) != 0) { 1838 if ((flags & TAG_OBJECT) != 0) {
1852 add(result, result, Operand(kHeapObjectTag)); 1839 add(result, result, Operand(kHeapObjectTag));
1853 } 1840 }
1854 } 1841 }
1855 1842
1856 1843
1857 void MacroAssembler::AllocateTwoByteString(Register result, 1844 void MacroAssembler::AllocateTwoByteString(Register result,
1858 Register length, 1845 Register length,
(...skipping 1852 matching lines...) Expand 10 before | Expand all | Expand 10 after
3711 } 3698 }
3712 } 3699 }
3713 if (mag.shift > 0) mov(result, Operand(result, ASR, mag.shift)); 3700 if (mag.shift > 0) mov(result, Operand(result, ASR, mag.shift));
3714 add(result, result, Operand(dividend, LSR, 31)); 3701 add(result, result, Operand(dividend, LSR, 31));
3715 } 3702 }
3716 3703
3717 } // namespace internal 3704 } // namespace internal
3718 } // namespace v8 3705 } // namespace v8
3719 3706
3720 #endif // V8_TARGET_ARCH_ARM 3707 #endif // V8_TARGET_ARCH_ARM
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