Implements FPU compare and branching for MIPS simulator, assembler, disassembler.

runtime/vm/disassembler_mips.cc

Index: runtime/vm/disassembler_mips.cc
===================================================================
--- runtime/vm/disassembler_mips.cc	(revision 22705)
+++ runtime/vm/disassembler_mips.cc	(working copy)
@@ -490,6 +490,38 @@
         Format(instr, "mov.'fmt 'fd, 'fs");
         break;
       }
+      case COP1_C_F: {
+        Format(instr, "c.f.'fmt 'fd, 'fs");
+        break;
+      }
+      case COP1_C_UN: {
+        Format(instr, "c.un.'fmt 'fd, 'fs");
+        break;
+      }
+      case COP1_C_EQ: {
+        Format(instr, "c.eq.'fmt 'fd, 'fs");
+        break;
+      }
+      case COP1_C_UEQ: {
+        Format(instr, "c.ueq.'fmt 'fd, 'fs");
+        break;
+      }
+      case COP1_C_OLT: {
+        Format(instr, "c.olt.'fmt 'fd, 'fs");
+        break;
+      }
+      case COP1_C_ULT: {
+        Format(instr, "c.ult.'fmt 'fd, 'fs");
+        break;
+      }
+      case COP1_C_OLE: {
+        Format(instr, "c.ole.'fmt 'fd, 'fs");
+        break;
+      }
+      case COP1_C_ULE: {
+        Format(instr, "c.ule.'fmt 'fd, 'fs");
+        break;
+      }
       default: {
         Unknown(instr);
         break;
@@ -514,6 +546,15 @@
         }
         break;
       }
+      case COP1_BC: {
+        ASSERT(instr->Bit(17) == 0);
+        if (instr->Bit(16) == 1) {  // Branch on true.
+          Format(instr, "bc1t 'dest");
+        } else {  // Branch on false.
+          Format(instr, "bc1f 'dest");
+        }
+        break;
+      }
       default: {
         Unknown(instr);
         break;