Implements FPU compare and branching for MIPS simulator, assembler, disassembler.

runtime/vm/disassembler_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/disassembler.h"
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_MIPS.
 #if defined(TARGET_ARCH_MIPS)
 #include "platform/assert.h"
 
@@ skipping 472 matching lines @@
     // the instruction.
     switch (instr->Cop1FunctionField()) {
       case COP1_ADD: {
         Format(instr, "add.'fmt 'fd, 'fs, 'ft");
         break;
       }
       case COP1_MOV: {
         Format(instr, "mov.'fmt 'fd, 'fs");
         break;
       }
+      case COP1_C_F: {
+        Format(instr, "c.f.'fmt 'fd, 'fs");
+        break;
+      }
+      case COP1_C_UN: {
+        Format(instr, "c.un.'fmt 'fd, 'fs");
+        break;
+      }
+      case COP1_C_EQ: {
+        Format(instr, "c.eq.'fmt 'fd, 'fs");
+        break;
+      }
+      case COP1_C_UEQ: {
+        Format(instr, "c.ueq.'fmt 'fd, 'fs");
+        break;
+      }
+      case COP1_C_OLT: {
+        Format(instr, "c.olt.'fmt 'fd, 'fs");
+        break;
+      }
+      case COP1_C_ULT: {
+        Format(instr, "c.ult.'fmt 'fd, 'fs");
+        break;
+      }
+      case COP1_C_OLE: {
+        Format(instr, "c.ole.'fmt 'fd, 'fs");
+        break;
+      }
+      case COP1_C_ULE: {
+        Format(instr, "c.ule.'fmt 'fd, 'fs");
+        break;
+      }
       default: {
         Unknown(instr);
         break;
       }
     }
   } else {
     // If the rs field isn't a valid format, then it must be a sub-opcode.
     switch (instr->Cop1SubField()) {
       case COP1_MF: {
         if (instr->Bits(0, 11) != 0) {
           Unknown(instr);
         } else {
           Format(instr, "mfc1 'rt, 'fs");
         }
         break;
       }
       case COP1_MT: {
         if (instr->Bits(0, 11) != 0) {
           Unknown(instr);
         } else {
           Format(instr, "mtc1 'rt, 'fs");
         }
         break;
       }
+      case COP1_BC: {
+        ASSERT(instr->Bit(17) == 0);
+        if (instr->Bit(16) == 1) {  // Branch on true.
+          Format(instr, "bc1t 'dest");
+        } else {  // Branch on false.
+          Format(instr, "bc1f 'dest");
+        }
+        break;
+      }
       default: {
         Unknown(instr);
         break;
       }
     }
   }
 }
 
 void MIPSDecoder::InstructionDecode(Instr* instr) {
   switch (instr->OpcodeField()) {
@@ skipping 164 matching lines @@
                                   pc);
     pc += instruction_length;
   }
 
   return;
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS