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1 ; This is a basic test of the alloca instruction. | 1 ; This is a basic test of the alloca instruction. |
2 | 2 |
3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ | 3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ |
4 ; RUN: --target x8632 -i %s --args -O2 -allow-externally-defined-symbols \ | 4 ; RUN: --target x8632 -i %s --args -O2 -allow-externally-defined-symbols \ |
5 ; RUN: | %if --need=target_X8632 --command FileCheck %s | 5 ; RUN: | %if --need=target_X8632 --command FileCheck %s |
6 | 6 |
7 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ | 7 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ |
8 ; RUN: --target x8632 -i %s --args -Om1 -allow-externally-defined-symbols \ | 8 ; RUN: --target x8632 -i %s --args -Om1 -allow-externally-defined-symbols \ |
9 ; RUN: | %if --need=target_X8632 --command FileCheck \ | 9 ; RUN: | %if --need=target_X8632 --command FileCheck \ |
10 ; RUN: --check-prefix CHECK-OPTM1 %s | 10 ; RUN: --check-prefix CHECK-OPTM1 %s |
11 | 11 |
12 ; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented) | 12 ; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented) |
13 ; once enough infrastructure is in. Also, switch to --filetype=obj | 13 ; once enough infrastructure is in. Also, switch to --filetype=obj |
14 ; when possible. | 14 ; when possible. |
15 ; RUN: %if --need=target_ARM32 --need=allow_dump \ | 15 ; RUN: %if --need=target_ARM32 --need=allow_dump \ |
16 ; RUN: --command %p2i --filetype=asm --assemble \ | 16 ; RUN: --command %p2i --filetype=asm --assemble \ |
17 ; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \ | 17 ; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \ |
18 ; RUN: -allow-externally-defined-symbols \ | 18 ; RUN: -allow-externally-defined-symbols \ |
19 ; RUN: | %if --need=target_ARM32 --need=allow_dump \ | 19 ; RUN: | %if --need=target_ARM32 --need=allow_dump \ |
20 ; RUN: --command FileCheck --check-prefix ARM32 %s | 20 ; RUN: --command FileCheck --check-prefix ARM32 --check-prefix=ARM-OPT2 %s |
21 | 21 |
22 ; RUN: %if --need=target_ARM32 --need=allow_dump \ | 22 ; RUN: %if --need=target_ARM32 --need=allow_dump \ |
23 ; RUN: --command %p2i --filetype=asm --assemble \ | 23 ; RUN: --command %p2i --filetype=asm --assemble \ |
24 ; RUN: --disassemble --target arm32 -i %s --args -Om1 --skip-unimplemented \ | 24 ; RUN: --disassemble --target arm32 -i %s --args -Om1 --skip-unimplemented \ |
25 ; RUN: -allow-externally-defined-symbols \ | 25 ; RUN: -allow-externally-defined-symbols \ |
26 ; RUN: | %if --need=target_ARM32 --need=allow_dump \ | 26 ; RUN: | %if --need=target_ARM32 --need=allow_dump \ |
27 ; RUN: --command FileCheck --check-prefix ARM32 %s | 27 ; RUN: --command FileCheck --check-prefix ARM32 --check-prefix=ARM-OPTM1 %s |
28 | 28 |
29 define internal void @fixed_416_align_16(i32 %n) { | 29 define internal void @fixed_416_align_16(i32 %n) { |
30 entry: | 30 entry: |
31 %array = alloca i8, i32 416, align 16 | 31 %array = alloca i8, i32 416, align 16 |
32 %__2 = ptrtoint i8* %array to i32 | 32 %__2 = ptrtoint i8* %array to i32 |
33 call void @f1(i32 %__2) | 33 call void @f1(i32 %__2) |
34 ret void | 34 ret void |
35 } | 35 } |
36 ; CHECK-LABEL: fixed_416_align_16 | 36 ; CHECK-LABEL: fixed_416_align_16 |
37 ; CHECK: sub esp,0x1ac | 37 ; CHECK: sub esp,0x1ac |
38 ; CHECK: sub esp,0x10 | 38 ; CHECK: sub esp,0x10 |
39 ; CHECK: mov DWORD PTR [esp],eax | 39 ; CHECK: mov DWORD PTR [esp],eax |
40 ; CHECK: call {{.*}} R_{{.*}} f1 | 40 ; CHECK: call {{.*}} R_{{.*}} f1 |
41 | 41 |
42 ; CHECK-OPTM1-LABEL: fixed_416_align_16 | 42 ; CHECK-OPTM1-LABEL: fixed_416_align_16 |
43 ; CHECK-OPTM1: sub esp,0xc | 43 ; CHECK-OPTM1: sub esp,0xc |
44 ; CHECK-OPTM1: sub esp,0x1a0 | 44 ; CHECK-OPTM1: sub esp,0x1a0 |
45 ; CHECK-OPTM1: sub esp,0x10 | 45 ; CHECK-OPTM1: sub esp,0x10 |
46 ; CHECK-OPTM1: mov DWORD PTR [esp],eax | 46 ; CHECK-OPTM1: mov DWORD PTR [esp],eax |
47 ; CHECK-OPTM1: call {{.*}} R_{{.*}} f1 | 47 ; CHECK-OPTM1: call {{.*}} R_{{.*}} f1 |
48 | 48 |
49 ; ARM32-LABEL: fixed_416_align_16 | 49 ; ARM32-LABEL: fixed_416_align_16 |
50 ; ARM32: sub sp, sp, #416 | 50 ; ARM32-OPT2: sub sp, sp, #428 |
51 ; ARM32: bl {{.*}} R_{{.*}} f1 | 51 ; ARM32-OPTM1: sub sp, sp, #416 |
| 52 ; ARM32: bl {{.*}} R_{{.*}} f1 |
52 | 53 |
53 define internal void @fixed_416_align_32(i32 %n) { | 54 define internal void @fixed_416_align_32(i32 %n) { |
54 entry: | 55 entry: |
55 %array = alloca i8, i32 400, align 32 | 56 %array = alloca i8, i32 400, align 32 |
56 %__2 = ptrtoint i8* %array to i32 | 57 %__2 = ptrtoint i8* %array to i32 |
57 call void @f1(i32 %__2) | 58 call void @f1(i32 %__2) |
58 ret void | 59 ret void |
59 } | 60 } |
60 ; CHECK-LABEL: fixed_416_align_32 | 61 ; CHECK-LABEL: fixed_416_align_32 |
61 ; CHECK: push ebp | 62 ; CHECK: push ebp |
62 ; CHECK-NEXT: mov ebp,esp | 63 ; CHECK-NEXT: mov ebp,esp |
63 ; CHECK: sub esp,0x1a8 | 64 ; CHECK: sub esp,0x1a8 |
64 ; CHECK: and esp,0xffffffe0 | 65 ; CHECK: and esp,0xffffffe0 |
65 ; CHECK: sub esp,0x10 | 66 ; CHECK: sub esp,0x10 |
66 ; CHECK: mov DWORD PTR [esp],eax | 67 ; CHECK: mov DWORD PTR [esp],eax |
67 ; CHECK: call {{.*}} R_{{.*}} f1 | 68 ; CHECK: call {{.*}} R_{{.*}} f1 |
68 | 69 |
69 ; ARM32-LABEL: fixed_416_align_32 | 70 ; ARM32-LABEL: fixed_416_align_32 |
70 ; ARM32: bic sp, sp, #31 | 71 ; ARM32-OPT2: sub sp, sp, #424 |
71 ; ARM32: sub sp, sp, #416 | 72 ; ARM32-OPTM1: sub sp, sp, #416 |
72 ; ARM32: bl {{.*}} R_{{.*}} f1 | 73 ; ARM32: bic sp, sp, #31 |
| 74 ; ARM32: bl {{.*}} R_{{.*}} f1 |
73 | 75 |
74 ; Show that the amount to allocate will be rounded up. | 76 ; Show that the amount to allocate will be rounded up. |
75 define internal void @fixed_351_align_16(i32 %n) { | 77 define internal void @fixed_351_align_16(i32 %n) { |
76 entry: | 78 entry: |
77 %array = alloca i8, i32 351, align 16 | 79 %array = alloca i8, i32 351, align 16 |
78 %__2 = ptrtoint i8* %array to i32 | 80 %__2 = ptrtoint i8* %array to i32 |
79 call void @f1(i32 %__2) | 81 call void @f1(i32 %__2) |
80 ret void | 82 ret void |
81 } | 83 } |
82 ; CHECK-LABEL: fixed_351_align_16 | 84 ; CHECK-LABEL: fixed_351_align_16 |
83 ; CHECK: sub esp,0x16c | 85 ; CHECK: sub esp,0x16c |
84 ; CHECK: mov DWORD PTR [esp],eax | 86 ; CHECK: mov DWORD PTR [esp],eax |
85 ; CHECK: call {{.*}} R_{{.*}} f1 | 87 ; CHECK: call {{.*}} R_{{.*}} f1 |
86 | 88 |
87 ; CHECK-OPTM1-LABEL: fixed_351_align_16 | 89 ; CHECK-OPTM1-LABEL: fixed_351_align_16 |
88 ; CHECK-OPTM1: sub esp,0xc | 90 ; CHECK-OPTM1: sub esp,0xc |
89 ; CHECK-OPTM1: sub esp,0x160 | 91 ; CHECK-OPTM1: sub esp,0x160 |
90 ; CHECK-OPTM1: mov DWORD PTR [esp],eax | 92 ; CHECK-OPTM1: mov DWORD PTR [esp],eax |
91 ; CHECK-OPTM1: call {{.*}} R_{{.*}} f1 | 93 ; CHECK-OPTM1: call {{.*}} R_{{.*}} f1 |
92 | 94 |
93 ; ARM32-LABEL: fixed_351_align_16 | 95 ; ARM32-LABEL: fixed_351_align_16 |
94 ; ARM32: sub sp, sp, #352 | 96 ; ARM32-OPT2: sub sp, sp, #364 |
95 ; ARM32: bl {{.*}} R_{{.*}} f1 | 97 ; ARM32-OPTM1: sub sp, sp, #352 |
| 98 ; ARM32: bl {{.*}} R_{{.*}} f1 |
96 | 99 |
97 define internal void @fixed_351_align_32(i32 %n) { | 100 define internal void @fixed_351_align_32(i32 %n) { |
98 entry: | 101 entry: |
99 %array = alloca i8, i32 351, align 32 | 102 %array = alloca i8, i32 351, align 32 |
100 %__2 = ptrtoint i8* %array to i32 | 103 %__2 = ptrtoint i8* %array to i32 |
101 call void @f1(i32 %__2) | 104 call void @f1(i32 %__2) |
102 ret void | 105 ret void |
103 } | 106 } |
104 ; CHECK-LABEL: fixed_351_align_32 | 107 ; CHECK-LABEL: fixed_351_align_32 |
105 ; CHECK: push ebp | 108 ; CHECK: push ebp |
106 ; CHECK-NEXT: mov ebp,esp | 109 ; CHECK-NEXT: mov ebp,esp |
107 ; CHECK: sub esp,0x168 | 110 ; CHECK: sub esp,0x168 |
108 ; CHECK: and esp,0xffffffe0 | 111 ; CHECK: and esp,0xffffffe0 |
109 ; CHECK: sub esp,0x10 | 112 ; CHECK: sub esp,0x10 |
110 ; CHECK: mov DWORD PTR [esp],eax | 113 ; CHECK: mov DWORD PTR [esp],eax |
111 ; CHECK: call {{.*}} R_{{.*}} f1 | 114 ; CHECK: call {{.*}} R_{{.*}} f1 |
112 | 115 |
113 ; ARM32-LABEL: fixed_351_align_32 | 116 ; ARM32-LABEL: fixed_351_align_32 |
114 ; ARM32: bic sp, sp, #31 | 117 ; ARM32-OPT2: sub sp, sp, #360 |
115 ; ARM32: sub sp, sp, #352 | 118 ; ARM32-OPTM1: sub sp, sp, #352 |
116 ; ARM32: bl {{.*}} R_{{.*}} f1 | 119 ; ARM32: bic sp, sp, #31 |
| 120 ; ARM32: bl {{.*}} R_{{.*}} f1 |
117 | 121 |
118 declare void @f1(i32 %ignored) | 122 declare void @f1(i32 %ignored) |
119 | 123 |
120 declare void @f2(i32 %ignored) | 124 declare void @f2(i32 %ignored) |
121 | 125 |
122 define internal void @variable_n_align_16(i32 %n) { | 126 define internal void @variable_n_align_16(i32 %n) { |
123 entry: | 127 entry: |
124 %array = alloca i8, i32 %n, align 16 | 128 %array = alloca i8, i32 %n, align 16 |
125 %__2 = ptrtoint i8* %array to i32 | 129 %__2 = ptrtoint i8* %array to i32 |
126 call void @f2(i32 %__2) | 130 call void @f2(i32 %__2) |
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289 %p1 = bitcast i8* %a1 to i32* | 293 %p1 = bitcast i8* %a1 to i32* |
290 %p2 = bitcast i8* %a2 to i32* | 294 %p2 = bitcast i8* %a2 to i32* |
291 %p3 = bitcast i8* %a3 to i32* | 295 %p3 = bitcast i8* %a3 to i32* |
292 store i32 %arg, i32* %p1, align 1 | 296 store i32 %arg, i32* %p1, align 1 |
293 store i32 %arg, i32* %p2, align 1 | 297 store i32 %arg, i32* %p2, align 1 |
294 store i32 %arg, i32* %p3, align 1 | 298 store i32 %arg, i32* %p3, align 1 |
295 ret void | 299 ret void |
296 } | 300 } |
297 ; CHECK-LABEL: var_with_frameptr | 301 ; CHECK-LABEL: var_with_frameptr |
298 ; CHECK: mov ebp,esp | 302 ; CHECK: mov ebp,esp |
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