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| 1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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| 34 #include "a64/cpu-a64.h" | 34 #include "a64/cpu-a64.h" |
| 35 #include "a64/utils-a64.h" | 35 #include "a64/utils-a64.h" |
| 36 | 36 |
| 37 namespace v8 { | 37 namespace v8 { |
| 38 namespace internal { | 38 namespace internal { |
| 39 | 39 |
| 40 #ifdef DEBUG | 40 #ifdef DEBUG |
| 41 bool CpuFeatures::initialized_ = false; | 41 bool CpuFeatures::initialized_ = false; |
| 42 #endif | 42 #endif |
| 43 unsigned CpuFeatures::supported_ = 0; | 43 unsigned CpuFeatures::supported_ = 0; |
| 44 | 44 unsigned CpuFeatures::found_by_runtime_probing_only_ = 0; |
| 45 | 45 |
| 46 // Initialise to smallest possible cache size. | 46 // Initialise to smallest possible cache size. |
| 47 unsigned CpuFeatures::dcache_line_size_ = 1; | 47 unsigned CpuFeatures::dcache_line_size_ = 1; |
| 48 unsigned CpuFeatures::icache_line_size_ = 1; | 48 unsigned CpuFeatures::icache_line_size_ = 1; |
| 49 | 49 |
| 50 | 50 |
| 51 void CPU::SetUp() { | 51 void CPU::SetUp() { |
| 52 CpuFeatures::Probe(); | 52 CpuFeatures::Probe(); |
| 53 } | 53 } |
| 54 | 54 |
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| 189 // Copy the content of the cache type register to a core register. | 189 // Copy the content of the cache type register to a core register. |
| 190 __asm__ __volatile__ ("mrs %[ctr], ctr_el0" // NOLINT | 190 __asm__ __volatile__ ("mrs %[ctr], ctr_el0" // NOLINT |
| 191 : [ctr] "=r" (cache_type_register)); | 191 : [ctr] "=r" (cache_type_register)); |
| 192 return cache_type_register; | 192 return cache_type_register; |
| 193 #endif | 193 #endif |
| 194 } | 194 } |
| 195 | 195 |
| 196 } } // namespace v8::internal | 196 } } // namespace v8::internal |
| 197 | 197 |
| 198 #endif // V8_TARGET_ARCH_A64 | 198 #endif // V8_TARGET_ARCH_A64 |
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