Add MVN (register, immediate) to ARM integrated assembler.

tests_lit/assembler/arm32/mvn.ll

Index: tests_lit/assembler/arm32/mvn.ll
diff --git a/tests_lit/assembler/arm32/mvn.ll b/tests_lit/assembler/arm32/mvn.ll
new file mode 100644
index 0000000000000000000000000000000000000000..f23d2183ce95b8857170bc02653b887e1066a7b5
--- /dev/null
+++ b/tests_lit/assembler/arm32/mvn.ll
@@ -0,0 +1,145 @@
+; Tests MVN instruction.
+
+; REQUIRES: allow_dump
+
+; Compile using standalone assembler.
+; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \
+; RUN:   | FileCheck %s --check-prefix=ASM
+
+; Show bytes in assembled standalone code.
+; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \
+; RUN:   --args -Om1 | FileCheck %s --check-prefix=DIS
+
+; Compile using integrated assembler.
+; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -Om1 \
+; RUN:   | FileCheck %s --check-prefix=IASM
+
+; Show bytes in assembled integrated code.
+; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \
+; RUN:   --args -Om1 | FileCheck %s --check-prefix=DIS
+
+define internal void @mvmEx(i32 %a, i32 %b) {

[Jim Stichnoth, 2015/11/22 04:15:38]

Should this be named mvnEx instead?

[Karl, 2015/11/30 16:54:11]

Done.

+; ASM-LABEL:mvmEx:
+; DIS-LABEL:00000000 <mvmEx>:
+; IASM-LABEL:mvmEx:
+
+entry:
+; ASM-NEXT:.LmvmEx$entry:
+; IASM-NEXT:.LmvmEx$entry:
+
+; ASM-NEXT:     sub     sp, sp, #24
+; DIS-NEXT:   0:        e24dd018
+; IASM-NEXT:    .byte 0x18
+; IASM-NEXT:    .byte 0xd0
+; IASM-NEXT:    .byte 0x4d
+; IASM-NEXT:    .byte 0xe2
+
+; ASM-NEXT:     str     r0, [sp, #20]
+; ASM-NEXT:     # [sp, #20] = def.pseudo 
+; DIS-NEXT:   4:        e58d0014
+; IASM-NEXT:    .byte 0x14
+; IASM-NEXT:    .byte 0x0
+; IASM-NEXT:    .byte 0x8d
+; IASM-NEXT:    .byte 0xe5
+
+; ASM-NEXT:     str     r1, [sp, #16]
+; ASM-NEXT:     # [sp, #16] = def.pseudo 
+; DIS-NEXT:   8:        e58d1010
+; IASM-NEXT:    .byte 0x10
+; IASM-NEXT:    .byte 0x10
+; IASM-NEXT:    .byte 0x8d
+; IASM-NEXT:    .byte 0xe5
+
+  %b.arg_trunc = trunc i32 %b to i1
+
+; ASM-NEXT:     ldr     r0, [sp, #16]
+; DIS-NEXT:   c:        e59d0010
+; IASM-NEXT:    .byte 0x10
+; IASM-NEXT:    .byte 0x0
+; IASM-NEXT:    .byte 0x9d
+; IASM-NEXT:    .byte 0xe5
+
+; ASM-NEXT:     and     r0, r0, #1
+; DIS-NEXT:  10:        e2000001
+; IASM-NEXT:    .byte 0x1
+; IASM-NEXT:    .byte 0x0
+; IASM-NEXT:    .byte 0x0
+; IASM-NEXT:    .byte 0xe2
+
+; ASM-NEXT:     strb    r0, [sp, #12]
+; ASM-NEXT:     # [sp, #12] = def.pseudo 
+; DIS-NEXT:  14:        e5cd000c
+; IASM-NEXT:    strb    r0, [sp, #12]
+
+  %a.arg_trunc = trunc i32 %a to i1
+
+; ASM-NEXT:     ldr     r0, [sp, #20]
+; DIS-NEXT:  18:        e59d0014
+; IASM-NEXT:    .byte 0x14
+; IASM-NEXT:    .byte 0x0
+; IASM-NEXT:    .byte 0x9d
+; IASM-NEXT:    .byte 0xe5
+
+; ASM-NEXT:     and     r0, r0, #1
+; DIS-NEXT:  1c:        e2000001
+; IASM-NEXT:    .byte 0x1
+; IASM-NEXT:    .byte 0x0
+; IASM-NEXT:    .byte 0x0
+; IASM-NEXT:    .byte 0xe2
+
+; ASM-NEXT:     strb    r0, [sp, #8]
+; ASM-NEXT:     # [sp, #8] = def.pseudo 
+; DIS-NEXT:  20:        e5cd0008
+; IASM-NEXT:    strb    r0, [sp, #8]
+
+  %conv = zext i1 %a.arg_trunc to i32
+
+; ASM-NEXT:     ldrb    r0, [sp, #8]
+; DIS-NEXT:  24:        e5dd0008
+; IASM-NEXT:    ldrb    r0, [sp, #8]
+
+; ASM-NEXT:     str     r0, [sp, #4]
+; ASM-NEXT:     # [sp, #4] = def.pseudo 
+; DIS-NEXT:  28:        e58d0004
+; IASM-NEXT:    .byte 0x4
+; IASM-NEXT:    .byte 0x0
+; IASM-NEXT:    .byte 0x8d
+; IASM-NEXT:    .byte 0xe5
+
+  %ignore = sext i1 %b.arg_trunc to i32
+
+; ASM-NEXT:     mov     r0, #0
+; DIS-NEXT:  2c:        e3a00000
+; IASM-NEXT:    .byte 0x0
+; IASM-NEXT:    .byte 0x0
+; IASM-NEXT:    .byte 0xa0
+; IASM-NEXT:    .byte 0xe3
+
+; ASM-NEXT:     ldrb    r1, [sp, #12]
+; DIS-NEXT:  30:        e5dd100c
+; IASM-NEXT:    ldrb    r1, [sp, #12]
+
+; ASM-NEXT:     tst     r1, #1
+; DIS-NEXT:  34:        e3110001
+; IASM-NEXT:    .byte 0x1
+; IASM-NEXT:    .byte 0x0
+; IASM-NEXT:    .byte 0x11
+; IASM-NEXT:    .byte 0xe3
+
+; ********* Use of MVN ********
+; ASM-NEXT:     mvn     r1, #0
+; DIS-NEXT:  38:        e3e01000
+; IASM-NEXT:    .byte 0x0
+; IASM-NEXT:    .byte 0x10
+; IASM-NEXT:    .byte 0xe0
+; IASM-NEXT:    .byte 0xe3
+
+; ASM-NEXT:     movne   r0, r1
+; DIS-NEXT:  3c:        11a00001
+; IASM-NEXT:    .byte 0x1
+; IASM-NEXT:    .byte 0x0
+; IASM-NEXT:    .byte 0xa0
+; IASM-NEXT:    .byte 0x11
+
+  ret void
+}