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| 1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===// | 1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===// |
| 2 // | 2 // |
| 3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 4 // for details. All rights reserved. Use of this source code is governed by a | 4 // for details. All rights reserved. Use of this source code is governed by a |
| 5 // BSD-style license that can be found in the LICENSE file. | 5 // BSD-style license that can be found in the LICENSE file. |
| 6 // | 6 // |
| 7 // Modified by the Subzero authors. | 7 // Modified by the Subzero authors. |
| 8 // | 8 // |
| 9 //===----------------------------------------------------------------------===// | 9 //===----------------------------------------------------------------------===// |
| 10 // | 10 // |
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| 231 void movw(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond); | 231 void movw(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond); |
| 232 | 232 |
| 233 void movt(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond); | 233 void movt(const Operand *OpRd, const Operand *OpSrc, CondARM32::Cond Cond); |
| 234 | 234 |
| 235 void mla(const Operand *OpRd, const Operand *OpRn, const Operand *OpRm, | 235 void mla(const Operand *OpRd, const Operand *OpRn, const Operand *OpRm, |
| 236 const Operand *OpRa, CondARM32::Cond Cond); | 236 const Operand *OpRa, CondARM32::Cond Cond); |
| 237 | 237 |
| 238 void mul(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, | 238 void mul(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, |
| 239 bool SetFlags, CondARM32::Cond Cond); | 239 bool SetFlags, CondARM32::Cond Cond); |
| 240 | 240 |
| 241 void mvn(const Operand* OpRd, const Operand *OpScc, CondARM32::Cond Cond); |
| 242 |
| 241 void orr(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, | 243 void orr(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, |
| 242 bool SetFlags, CondARM32::Cond Cond); | 244 bool SetFlags, CondARM32::Cond Cond); |
| 243 | 245 |
| 244 void pop(const Operand *OpRt, CondARM32::Cond Cond); | 246 void pop(const Operand *OpRt, CondARM32::Cond Cond); |
| 245 | 247 |
| 246 // Note: Registers is a bitset, where bit n corresponds to register Rn. | 248 // Note: Registers is a bitset, where bit n corresponds to register Rn. |
| 247 void popList(const IValueT Registers, CondARM32::Cond Cond); | 249 void popList(const IValueT Registers, CondARM32::Cond Cond); |
| 248 | 250 |
| 249 void push(const Operand *OpRt, CondARM32::Cond Cond); | 251 void push(const Operand *OpRt, CondARM32::Cond Cond); |
| 250 | 252 |
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| 386 // cccc=Cond, xxxxxxx<<21=Opcode, dddd=Rd, s=SetFlags, and | 388 // cccc=Cond, xxxxxxx<<21=Opcode, dddd=Rd, s=SetFlags, and |
| 387 // iiiiiiiiiiiiiiii=Imm16. | 389 // iiiiiiiiiiiiiiii=Imm16. |
| 388 void emitMovw(IValueT Opcode, IValueT Rd, IValueT Imm16, bool SetFlags, | 390 void emitMovw(IValueT Opcode, IValueT Rd, IValueT Imm16, bool SetFlags, |
| 389 CondARM32::Cond Cond); | 391 CondARM32::Cond Cond); |
| 390 }; | 392 }; |
| 391 | 393 |
| 392 } // end of namespace ARM32 | 394 } // end of namespace ARM32 |
| 393 } // end of namespace Ice | 395 } // end of namespace Ice |
| 394 | 396 |
| 395 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H | 397 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H |
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