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Issue 14605006: Allows "Hello, world!" to run on ARM hardware. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 7 years, 7 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_ARM) 6 #if defined(TARGET_ARCH_ARM)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/simulator.h" 9 #include "vm/simulator.h"
10 #include "vm/runtime_entry.h" 10 #include "vm/runtime_entry.h"
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556 556
557 557
558 void Assembler::strd(Register rd, Address ad, Condition cond) { 558 void Assembler::strd(Register rd, Address ad, Condition cond) {
559 ASSERT((rd % 2) == 0); 559 ASSERT((rd % 2) == 0);
560 EmitMemOpAddressMode3(cond, B7 | B6 | B5 | B4, rd, ad); 560 EmitMemOpAddressMode3(cond, B7 | B6 | B5 | B4, rd, ad);
561 } 561 }
562 562
563 563
564 void Assembler::ldm(BlockAddressMode am, Register base, RegList regs, 564 void Assembler::ldm(BlockAddressMode am, Register base, RegList regs,
565 Condition cond) { 565 Condition cond) {
566 ASSERT(regs != 0);
566 EmitMultiMemOp(cond, am, true, base, regs); 567 EmitMultiMemOp(cond, am, true, base, regs);
567 } 568 }
568 569
569 570
570 void Assembler::stm(BlockAddressMode am, Register base, RegList regs, 571 void Assembler::stm(BlockAddressMode am, Register base, RegList regs,
571 Condition cond) { 572 Condition cond) {
573 ASSERT(regs != 0);
572 EmitMultiMemOp(cond, am, false, base, regs); 574 EmitMultiMemOp(cond, am, false, base, regs);
573 } 575 }
574 576
575 577
576 void Assembler::ldrex(Register rt, Register rn, Condition cond) { 578 void Assembler::ldrex(Register rt, Register rn, Condition cond) {
577 ASSERT(rn != kNoRegister); 579 ASSERT(rn != kNoRegister);
578 ASSERT(rt != kNoRegister); 580 ASSERT(rt != kNoRegister);
579 ASSERT(cond != kNoCondition); 581 ASSERT(cond != kNoCondition);
580 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 582 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) |
581 B24 | 583 B24 |
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1148 1150
1149 1151
1150 void Assembler::svc(uint32_t imm24, Condition cond) { 1152 void Assembler::svc(uint32_t imm24, Condition cond) {
1151 ASSERT(cond != kNoCondition); 1153 ASSERT(cond != kNoCondition);
1152 ASSERT(imm24 < (1 << 24)); 1154 ASSERT(imm24 < (1 << 24));
1153 int32_t encoding = (cond << kConditionShift) | B27 | B26 | B25 | B24 | imm24; 1155 int32_t encoding = (cond << kConditionShift) | B27 | B26 | B25 | B24 | imm24;
1154 Emit(encoding); 1156 Emit(encoding);
1155 } 1157 }
1156 1158
1157 1159
1158 void Assembler::bkpt(uint16_t imm16, Condition cond) { 1160 void Assembler::bkpt(uint16_t imm16) {
1159 ASSERT(cond != kNoCondition); 1161 // bkpt requires that the cond field is AL.
1160 int32_t encoding = (cond << kConditionShift) | B24 | B21 | 1162 int32_t encoding = (AL << kConditionShift) | B24 | B21 |
1161 ((imm16 >> 4) << 8) | B6 | B5 | B4 | (imm16 & 0xf); 1163 ((imm16 >> 4) << 8) | B6 | B5 | B4 | (imm16 & 0xf);
1162 Emit(encoding); 1164 Emit(encoding);
1163 } 1165 }
1164 1166
1165 1167
1166 void Assembler::b(Label* label, Condition cond) { 1168 void Assembler::b(Label* label, Condition cond) {
1167 EmitBranch(cond, label, false); 1169 EmitBranch(cond, label, false);
1168 } 1170 }
1169 1171
1170 1172
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2126 2128
2127 const char* Assembler::FpuRegisterName(FpuRegister reg) { 2129 const char* Assembler::FpuRegisterName(FpuRegister reg) {
2128 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); 2130 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
2129 return fpu_reg_names[reg]; 2131 return fpu_reg_names[reg];
2130 } 2132 }
2131 2133
2132 } // namespace dart 2134 } // namespace dart
2133 2135
2134 #endif // defined TARGET_ARCH_ARM 2136 #endif // defined TARGET_ARCH_ARM
2135 2137
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