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Side by Side Diff: runtime/vm/assembler_arm.cc

Issue 14605006: Allows "Hello, world!" to run on ARM hardware. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 7 years, 7 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_ARM) 6 #if defined(TARGET_ARCH_ARM)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/simulator.h" 9 #include "vm/simulator.h"
10 #include "vm/runtime_entry.h" 10 #include "vm/runtime_entry.h"
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562 562
563 563
564 void Assembler::ldm(BlockAddressMode am, Register base, RegList regs, 564 void Assembler::ldm(BlockAddressMode am, Register base, RegList regs,
565 Condition cond) { 565 Condition cond) {
566 EmitMultiMemOp(cond, am, true, base, regs); 566 EmitMultiMemOp(cond, am, true, base, regs);
567 } 567 }
568 568
569 569
570 void Assembler::stm(BlockAddressMode am, Register base, RegList regs, 570 void Assembler::stm(BlockAddressMode am, Register base, RegList regs,
571 Condition cond) { 571 Condition cond) {
572 ASSERT(regs != 0);
572 EmitMultiMemOp(cond, am, false, base, regs); 573 EmitMultiMemOp(cond, am, false, base, regs);
573 } 574 }
574 575
575 576
576 void Assembler::ldrex(Register rt, Register rn, Condition cond) { 577 void Assembler::ldrex(Register rt, Register rn, Condition cond) {
577 ASSERT(rn != kNoRegister); 578 ASSERT(rn != kNoRegister);
578 ASSERT(rt != kNoRegister); 579 ASSERT(rt != kNoRegister);
579 ASSERT(cond != kNoCondition); 580 ASSERT(cond != kNoCondition);
580 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 581 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) |
581 B24 | 582 B24 |
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1148 1149
1149 1150
1150 void Assembler::svc(uint32_t imm24, Condition cond) { 1151 void Assembler::svc(uint32_t imm24, Condition cond) {
1151 ASSERT(cond != kNoCondition); 1152 ASSERT(cond != kNoCondition);
1152 ASSERT(imm24 < (1 << 24)); 1153 ASSERT(imm24 < (1 << 24));
1153 int32_t encoding = (cond << kConditionShift) | B27 | B26 | B25 | B24 | imm24; 1154 int32_t encoding = (cond << kConditionShift) | B27 | B26 | B25 | B24 | imm24;
1154 Emit(encoding); 1155 Emit(encoding);
1155 } 1156 }
1156 1157
1157 1158
1158 void Assembler::bkpt(uint16_t imm16, Condition cond) { 1159 void Assembler::bkpt(uint16_t imm16) {
1159 ASSERT(cond != kNoCondition); 1160 // bkpt requires that the cond field is AL.
1160 int32_t encoding = (cond << kConditionShift) | B24 | B21 | 1161 int32_t encoding = (AL << kConditionShift) | B24 | B21 |
1161 ((imm16 >> 4) << 8) | B6 | B5 | B4 | (imm16 & 0xf); 1162 ((imm16 >> 4) << 8) | B6 | B5 | B4 | (imm16 & 0xf);
1162 Emit(encoding); 1163 Emit(encoding);
1163 } 1164 }
1164 1165
1165 1166
1166 void Assembler::b(Label* label, Condition cond) { 1167 void Assembler::b(Label* label, Condition cond) {
1167 EmitBranch(cond, label, false); 1168 EmitBranch(cond, label, false);
1168 } 1169 }
1169 1170
1170 1171
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2126 2127
2127 const char* Assembler::FpuRegisterName(FpuRegister reg) { 2128 const char* Assembler::FpuRegisterName(FpuRegister reg) {
2128 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); 2129 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
2129 return fpu_reg_names[reg]; 2130 return fpu_reg_names[reg];
2130 } 2131 }
2131 2132
2132 } // namespace dart 2133 } // namespace dart
2133 2134
2134 #endif // defined TARGET_ARCH_ARM 2135 #endif // defined TARGET_ARCH_ARM
2135 2136
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