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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
(...skipping 2175 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
2186 emit(EXT4 | FCTID | frt.code() * B21 | frb.code() * B11 | rc); | 2186 emit(EXT4 | FCTID | frt.code() * B21 | frb.code() * B11 | rc); |
2187 } | 2187 } |
2188 | 2188 |
2189 | 2189 |
2190 void Assembler::fctidz(const DoubleRegister frt, const DoubleRegister frb, | 2190 void Assembler::fctidz(const DoubleRegister frt, const DoubleRegister frb, |
2191 RCBit rc) { | 2191 RCBit rc) { |
2192 emit(EXT4 | FCTIDZ | frt.code() * B21 | frb.code() * B11 | rc); | 2192 emit(EXT4 | FCTIDZ | frt.code() * B21 | frb.code() * B11 | rc); |
2193 } | 2193 } |
2194 | 2194 |
2195 | 2195 |
| 2196 void Assembler::fctidu(const DoubleRegister frt, const DoubleRegister frb, |
| 2197 RCBit rc) { |
| 2198 emit(EXT4 | FCTIDU | frt.code() * B21 | frb.code() * B11 | rc); |
| 2199 } |
| 2200 |
| 2201 |
| 2202 void Assembler::fctiduz(const DoubleRegister frt, const DoubleRegister frb, |
| 2203 RCBit rc) { |
| 2204 emit(EXT4 | FCTIDUZ | frt.code() * B21 | frb.code() * B11 | rc); |
| 2205 } |
| 2206 |
| 2207 |
2196 void Assembler::fsel(const DoubleRegister frt, const DoubleRegister fra, | 2208 void Assembler::fsel(const DoubleRegister frt, const DoubleRegister fra, |
2197 const DoubleRegister frc, const DoubleRegister frb, | 2209 const DoubleRegister frc, const DoubleRegister frb, |
2198 RCBit rc) { | 2210 RCBit rc) { |
2199 emit(EXT4 | FSEL | frt.code() * B21 | fra.code() * B16 | frb.code() * B11 | | 2211 emit(EXT4 | FSEL | frt.code() * B21 | fra.code() * B16 | frb.code() * B11 | |
2200 frc.code() * B6 | rc); | 2212 frc.code() * B6 | rc); |
2201 } | 2213 } |
2202 | 2214 |
2203 | 2215 |
2204 void Assembler::fneg(const DoubleRegister frt, const DoubleRegister frb, | 2216 void Assembler::fneg(const DoubleRegister frt, const DoubleRegister frb, |
2205 RCBit rc) { | 2217 RCBit rc) { |
(...skipping 237 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
2443 | 2455 |
2444 trampoline_ = Trampoline(pc_offset() - size, tracked_branch_count_); | 2456 trampoline_ = Trampoline(pc_offset() - size, tracked_branch_count_); |
2445 } | 2457 } |
2446 } | 2458 } |
2447 | 2459 |
2448 | 2460 |
2449 } // namespace internal | 2461 } // namespace internal |
2450 } // namespace v8 | 2462 } // namespace v8 |
2451 | 2463 |
2452 #endif // V8_TARGET_ARCH_PPC | 2464 #endif // V8_TARGET_ARCH_PPC |
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