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Side by Side Diff: test/unittests/compiler/mips/instruction-selector-mips-unittest.cc

Issue 1459723002: MIPS: [turbofan] Add matching rule to use Nor instruction. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fixed typo. Created 5 years, 1 month ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file 3 // found in the LICENSE file
4 4
5 #include "test/unittests/compiler/instruction-selector-unittest.h" 5 #include "test/unittests/compiler/instruction-selector-unittest.h"
6 6
7 namespace v8 { 7 namespace v8 {
8 namespace internal { 8 namespace internal {
9 namespace compiler { 9 namespace compiler {
10 10
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355 EXPECT_EQ(dpi.arch_opcode, s[0]->arch_opcode()); 355 EXPECT_EQ(dpi.arch_opcode, s[0]->arch_opcode());
356 EXPECT_EQ(2U, s[0]->InputCount()); 356 EXPECT_EQ(2U, s[0]->InputCount());
357 EXPECT_EQ(1U, s[0]->OutputCount()); 357 EXPECT_EQ(1U, s[0]->OutputCount());
358 } 358 }
359 359
360 360
361 INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorLogicalTest, 361 INSTANTIATE_TEST_CASE_P(InstructionSelectorTest, InstructionSelectorLogicalTest,
362 ::testing::ValuesIn(kLogicalInstructions)); 362 ::testing::ValuesIn(kLogicalInstructions));
363 363
364 364
365 TEST_F(InstructionSelectorTest, Word32XorMinusOneWithWord32Or) {
366 {
367 StreamBuilder m(this, kMachInt32, kMachInt32);
368 m.Return(m.Word32Xor(m.Word32Or(m.Parameter(0), m.Parameter(0)),
369 m.Int32Constant(-1)));
370 Stream s = m.Build();
371 ASSERT_EQ(1U, s.size());
372 EXPECT_EQ(kMipsNor, s[0]->arch_opcode());
373 EXPECT_EQ(2U, s[0]->InputCount());
374 EXPECT_EQ(1U, s[0]->OutputCount());
375 }
376 {
377 StreamBuilder m(this, kMachInt32, kMachInt32);
378 m.Return(m.Word32Xor(m.Int32Constant(-1),
379 m.Word32Or(m.Parameter(0), m.Parameter(0))));
380 Stream s = m.Build();
381 ASSERT_EQ(1U, s.size());
382 EXPECT_EQ(kMipsNor, s[0]->arch_opcode());
383 EXPECT_EQ(2U, s[0]->InputCount());
384 EXPECT_EQ(1U, s[0]->OutputCount());
385 }
386 }
387
388
365 TEST_F(InstructionSelectorTest, Word32AndWithImmediateWithWord32Shr) { 389 TEST_F(InstructionSelectorTest, Word32AndWithImmediateWithWord32Shr) {
366 // The available shift operand range is `0 <= imm < 32`, but we also test 390 // The available shift operand range is `0 <= imm < 32`, but we also test
367 // that immediates outside this range are handled properly (modulo-32). 391 // that immediates outside this range are handled properly (modulo-32).
368 TRACED_FORRANGE(int32_t, shift, -32, 63) { 392 TRACED_FORRANGE(int32_t, shift, -32, 63) {
369 int32_t lsb = shift & 0x1f; 393 int32_t lsb = shift & 0x1f;
370 TRACED_FORRANGE(int32_t, width, 1, 31) { 394 TRACED_FORRANGE(int32_t, width, 1, 31) {
371 uint32_t msk = (1 << width) - 1; 395 uint32_t msk = (1 << width) - 1;
372 StreamBuilder m(this, kMachInt32, kMachInt32); 396 StreamBuilder m(this, kMachInt32, kMachInt32);
373 m.Return(m.Word32And(m.Word32Shr(m.Parameter(0), m.Int32Constant(shift)), 397 m.Return(m.Word32And(m.Word32Shr(m.Parameter(0), m.Int32Constant(shift)),
374 m.Int32Constant(msk))); 398 m.Int32Constant(msk)));
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985 EXPECT_EQ(kMipsFloat64Min, s[0]->arch_opcode()); 1009 EXPECT_EQ(kMipsFloat64Min, s[0]->arch_opcode());
986 ASSERT_EQ(2U, s[0]->InputCount()); 1010 ASSERT_EQ(2U, s[0]->InputCount());
987 ASSERT_EQ(1U, s[0]->OutputCount()); 1011 ASSERT_EQ(1U, s[0]->OutputCount());
988 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output())); 1012 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
989 } 1013 }
990 1014
991 1015
992 } // namespace compiler 1016 } // namespace compiler
993 } // namespace internal 1017 } // namespace internal
994 } // namespace v8 1018 } // namespace v8
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