Compute out arguments size

src/IceTargetLoweringX86BaseImpl.h

 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 5305 matching lines @@
   }
 
   // Pause constant blinding or pooling, blinding or pooling will be done later
   // during phi lowering assignments
   BoolFlagSaver B(RandomizationPoolingPaused, true);
   PhiLowering::prelowerPhis32Bit<TargetX86Base<Machine>>(
       this, Context.getNode(), Func);
 }
 
 template <class Machine>
+uint32_t
+TargetX86Base<Machine>::getCallStackArgumentsSizeBytes(const InstCall *Instr) {
+  uint32_t OutArgumentsSizeBytes = 0;
+  uint32_t XmmArgCount = 0;
+  uint32_t GprArgCount = 0;
+  // Classify each argument operand according to the location where the
+  // argument is passed.
+  for (SizeT i = 0, NumArgs = Instr->getNumArgs(); i < NumArgs; ++i) {
+    Operand *Arg = Instr->getArg(i);
+    Type Ty = Arg->getType();
+    // The PNaCl ABI requires the width of arguments to be at least 32 bits.
+    assert(typeWidthInBytes(Ty) >= 4);
+    if (isVectorType(Ty) && XmmArgCount < Traits::X86_MAX_XMM_ARGS) {
+      ++XmmArgCount;
+    } else if (isScalarIntegerType(Ty) &&
+               GprArgCount < Traits::X86_MAX_GPR_ARGS) {
+      // The 64 bit ABI allows some integers to be passed in GPRs.
+      ++GprArgCount;
+    } else {
+      if (isVectorType(Arg->getType())) {
+        OutArgumentsSizeBytes =
+            Traits::applyStackAlignment(OutArgumentsSizeBytes);
+      }
+      OutArgumentsSizeBytes += typeWidthInBytesOnStack(Arg->getType());
+    }
+  }
+  if (Traits::Is64Bit)
+    return OutArgumentsSizeBytes;
+  // The 32 bit ABI requires floating point values to be returned on the x87 FP
+  // stack. Ensure there is enough space for the fstp/movs for floating returns.
+  Variable *Dest = Instr->getDest();
+  if (Dest == nullptr)
+    return OutArgumentsSizeBytes;
+  const Type DestType = Dest->getType();
+  if (isScalarFloatingType(Dest->getType())) {

[Jim Stichnoth, 2015/11/22 04:12:16]

use DestType instead of Dest->getType()

+    OutArgumentsSizeBytes =
+        std::max(OutArgumentsSizeBytes,
+                 static_cast<uint32_t>(typeWidthInBytesOnStack(DestType)));
+  }
+  return OutArgumentsSizeBytes;
+}
+
+template <class Machine>
 Variable *TargetX86Base<Machine>::makeZeroedRegister(Type Ty, int32_t RegNum) {
   Variable *Reg = makeReg(Ty, RegNum);
   switch (Ty) {
   case IceType_i1:
   case IceType_i8:
   case IceType_i16:
   case IceType_i32:
   case IceType_i64:
     // Conservatively do "mov reg, 0" to avoid modifying FLAGS.
     _mov(Reg, Ctx->getConstantZero(Ty));
@@ skipping 687 matching lines @@
   }
   // the offset is not eligible for blinding or pooling, return the original
   // mem operand
   return MemOperand;
 }
 
 } // end of namespace X86Internal
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H