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Side by Side Diff: src/compiler/mips/instruction-codes-mips.h

Issue 1457523002: MIPS: Enable logical shift right and bitwise And matching to Ext, Dext. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 1 month ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 12 matching lines...) Expand all
23 V(MipsDivU) \ 23 V(MipsDivU) \
24 V(MipsMod) \ 24 V(MipsMod) \
25 V(MipsModU) \ 25 V(MipsModU) \
26 V(MipsAnd) \ 26 V(MipsAnd) \
27 V(MipsOr) \ 27 V(MipsOr) \
28 V(MipsXor) \ 28 V(MipsXor) \
29 V(MipsClz) \ 29 V(MipsClz) \
30 V(MipsShl) \ 30 V(MipsShl) \
31 V(MipsShr) \ 31 V(MipsShr) \
32 V(MipsSar) \ 32 V(MipsSar) \
33 V(MipsExt) \
33 V(MipsRor) \ 34 V(MipsRor) \
34 V(MipsMov) \ 35 V(MipsMov) \
35 V(MipsTst) \ 36 V(MipsTst) \
36 V(MipsCmp) \ 37 V(MipsCmp) \
37 V(MipsCmpS) \ 38 V(MipsCmpS) \
38 V(MipsAddS) \ 39 V(MipsAddS) \
39 V(MipsSubS) \ 40 V(MipsSubS) \
40 V(MipsMulS) \ 41 V(MipsMulS) \
41 V(MipsDivS) \ 42 V(MipsDivS) \
42 V(MipsModS) \ 43 V(MipsModS) \
(...skipping 62 matching lines...) Expand 10 before | Expand all | Expand 10 after
105 #define TARGET_ADDRESSING_MODE_LIST(V) \ 106 #define TARGET_ADDRESSING_MODE_LIST(V) \
106 V(MRI) /* [%r0 + K] */ \ 107 V(MRI) /* [%r0 + K] */ \
107 V(MRR) /* [%r0 + %r1] */ 108 V(MRR) /* [%r0 + %r1] */
108 109
109 110
110 } // namespace compiler 111 } // namespace compiler
111 } // namespace internal 112 } // namespace internal
112 } // namespace v8 113 } // namespace v8
113 114
114 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 115 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
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