A64: Implement LOsrEntry and LUnknownOSRValue

A64: Implement LOsrEntry and LUnknownOSRValue

BUG=314606
R=baptiste.afsa@arm.com, ulan@chromium.org

Committed: https://code.google.com/p/v8/source/detail?r=18854

[baptiste.afsa1, 2014-01-23 16:01:44]

lgtm

[ulan, 2014-01-24 09:06:03]

lgtm

[jochen (gone - plz use gerrit), 2014-01-24 11:08:39]

getting closer to having working OSR... but now it crashes a lot :(

I guess I'll need to sit with some OSR expert and have a look at the code.

[jochen (gone - plz use gerrit), 2014-01-24 14:03:02]

+titzer

[titzer, 2014-01-24 17:04:32]

The OSR entry machinery changed a lot since your branch. The overall idea is
that the OSR entry is actually a second prologue for the function, and the
optimized frame actually subsumes the unoptimized frame.

I'll try to find representative CLs for the entrypoint changes on ARM and IA32,
but here are general comments.

https://codereview.chromium.org/145713002/diff/110001/src/a64/builtins-a64.cc
File src/a64/builtins-a64.cc (right):

https://codereview.chromium.org/145713002/diff/110001/src/a64/builtins-a64.cc...
src/a64/builtins-a64.cc:947: __
CallRuntime(Runtime::kCompileForOnStackReplacement, 1);
This runtime call no longer returns the AST to indicate a successful compile,
but instead returns an actual code object, which one should check against NULL
(i.e. SMI 0). If non-null, then this code should compute the OSR entry offset
and jump directly to that.

https://codereview.chromium.org/145713002/diff/110001/src/a64/lithium-a64.cc
File src/a64/lithium-a64.cc (right):

https://codereview.chromium.org/145713002/diff/110001/src/a64/lithium-a64.cc#...
src/a64/lithium-a64.cc:2460: }
You will need to define these OSR values in exactly the right spill slot so that
the register allocator maps them to the correct location in the frame. See the
arm port for reference.

https://codereview.chromium.org/145713002/diff/110001/src/a64/lithium-codegen...
File src/a64/lithium-codegen-a64.cc (right):

https://codereview.chromium.org/145713002/diff/110001/src/a64/lithium-codegen...
src/a64/lithium-codegen-a64.cc:1928: if (osr_pc_offset_ == -1) osr_pc_offset_ =
masm()->pc_offset();
You should have a subroutine like DoGenerateOsrPrologue() that roughly defines a
new prologue for the function; see the arm port for reference.

Basically, this prologue must set up the frame, because the builtin will jump
directly into the middle of this code from the unoptimized code.

[jochen (gone - plz use gerrit), 2014-01-24 22:20:04]

The changes match what arm has on this branch - it's from around last July, so
it doesn't quite match bleeding_edge :-/

[jochen (gone - plz use gerrit), 2014-01-27 12:32:31]

updated once again. Looks like it's working now

[jochen (gone - plz use gerrit), 2014-01-27 14:33:03]

Committed patchset #4 manually as r18854 (presubmit successful).