Add LSL (register, immediate) to ARM integrated assembler.

src/DartARM32/assembler_arm.h

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe
 // Please update the (git) revision if we merge changes from Dart.
 // https://code.google.com/p/dart/wiki/GettingTheSource
 
 #ifndef VM_ASSEMBLER_ARM_H_
 #define VM_ASSEMBLER_ARM_H_
@@ skipping 140 matching lines @@
     encoding_ = (rotate << kRotateShift) | (immed8 << kImmed8Shift);
   }
 
   // Moved to decodeOperand() in IceAssemblerARM32.cpp
   // Data-processing operands - Register.
   explicit Operand(Register rm) {
     type_ = 0;
     encoding_ = static_cast<uint32_t>(rm);
   }
 
-  // Moved to encodeShiftRotateImm5()
+  // Moved to encodeShiftRotateImm5() in IceAssemblerARM32.cpp
   // Data-processing operands - Logical shift/rotate by immediate.
   Operand(Register rm, Shift shift, uint32_t shift_imm) {
     ASSERT(shift_imm < (1 << kShiftImmBits));
     type_ = 0;
     encoding_ = shift_imm << kShiftImmShift |
                 static_cast<uint32_t>(shift) << kShiftShift |
                 static_cast<uint32_t>(rm);
   }
-#endif
 
+  // Moved to encodeShiftRotateReg() in IceAssemblerARM32.cpp
   // Data-processing operands - Logical shift/rotate by register.
   Operand(Register rm, Shift shift, Register rs) {
     type_ = 0;
     encoding_ = static_cast<uint32_t>(rs) << kShiftRegisterShift |
                 static_cast<uint32_t>(shift) << kShiftShift | (1 << 4) |
                 static_cast<uint32_t>(rm);
   }
 
-#if 0
   // Already defined as ARM32::OperandARM32FlexImm::canHoldImm().
   static bool CanHold(uint32_t immediate, Operand* o) {
     // Avoid the more expensive test for frequent small immediate values.
     if (immediate < (1 << kImmed8Bits)) {
       o->type_ = 1;
       o->encoding_ = (0 << kRotateShift) | (immediate << kImmed8Shift);
       return true;
     }
     // Note that immediate must be unsigned for the test to work correctly.
     for (int rot = 0; rot < 16; rot++) {
@@ skipping 758 matching lines @@
   // Moved to ARM32::AssemblerARM32::pushList().
   void PushList(RegList regs, Condition cond = AL);
 
   // Moved to ARM32::AssemblerARM32::popList().
   void PopList(RegList regs, Condition cond = AL);
 #endif
   void MoveRegister(Register rd, Register rm, Condition cond = AL);
 
   // Convenience shift instructions. Use mov instruction with shifter operand
   // for variants setting the status flags.
+#if 0
+  // Moved to ARM32::AssemblerARM32::lsl()
   void Lsl(Register rd, Register rm, const Operand& shift_imm,
            Condition cond = AL);
+  // Moved to ARM32::AssemblerARM32::lsl()
   void Lsl(Register rd, Register rm, Register rs, Condition cond = AL);
+#endif
   void Lsr(Register rd, Register rm, const Operand& shift_imm,
            Condition cond = AL);
   void Lsr(Register rd, Register rm, Register rs, Condition cond = AL);
   void Asr(Register rd, Register rm, const Operand& shift_imm,
            Condition cond = AL);
   void Asr(Register rd, Register rm, Register rs, Condition cond = AL);
   void Asrs(Register rd, Register rm, const Operand& shift_imm,
             Condition cond = AL);
   void Ror(Register rd, Register rm, const Operand& shift_imm,
            Condition cond = AL);
@@ skipping 339 matching lines @@
   // ARM32::AssemblerARM::uxt() (uxtb and uxth).
 #endif
 
   DISALLOW_ALLOCATION();
   DISALLOW_COPY_AND_ASSIGN(Assembler);
 };
 
 }  // namespace dart
 
 #endif  // VM_ASSEMBLER_ARM_H_