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| 1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include "src/compiler/code-generator.h" | 5 #include "src/compiler/code-generator.h" |
| 6 | 6 |
| 7 #include "src/arm64/frames-arm64.h" | 7 #include "src/arm64/frames-arm64.h" |
| 8 #include "src/arm64/macro-assembler-arm64.h" | 8 #include "src/arm64/macro-assembler-arm64.h" |
| 9 #include "src/compiler/code-generator-impl.h" | 9 #include "src/compiler/code-generator-impl.h" |
| 10 #include "src/compiler/gap-resolver.h" | 10 #include "src/compiler/gap-resolver.h" |
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| 973 break; | 973 break; |
| 974 case kArm64Float64ToFloat32: | 974 case kArm64Float64ToFloat32: |
| 975 __ Fcvt(i.OutputDoubleRegister().S(), i.InputDoubleRegister(0)); | 975 __ Fcvt(i.OutputDoubleRegister().S(), i.InputDoubleRegister(0)); |
| 976 break; | 976 break; |
| 977 case kArm64Float64ToInt32: | 977 case kArm64Float64ToInt32: |
| 978 __ Fcvtzs(i.OutputRegister32(), i.InputDoubleRegister(0)); | 978 __ Fcvtzs(i.OutputRegister32(), i.InputDoubleRegister(0)); |
| 979 break; | 979 break; |
| 980 case kArm64Float64ToUint32: | 980 case kArm64Float64ToUint32: |
| 981 __ Fcvtzu(i.OutputRegister32(), i.InputDoubleRegister(0)); | 981 __ Fcvtzu(i.OutputRegister32(), i.InputDoubleRegister(0)); |
| 982 break; | 982 break; |
| 983 case kArm64Float64ToInt64: |
| 984 __ Fcvtzs(i.OutputRegister64(), i.InputDoubleRegister(0)); |
| 985 break; |
| 983 case kArm64Int32ToFloat64: | 986 case kArm64Int32ToFloat64: |
| 984 __ Scvtf(i.OutputDoubleRegister(), i.InputRegister32(0)); | 987 __ Scvtf(i.OutputDoubleRegister(), i.InputRegister32(0)); |
| 985 break; | 988 break; |
| 986 case kArm64Int64ToFloat32: | 989 case kArm64Int64ToFloat32: |
| 987 __ Scvtf(i.OutputDoubleRegister().S(), i.InputRegister64(0)); | 990 __ Scvtf(i.OutputDoubleRegister().S(), i.InputRegister64(0)); |
| 988 break; | 991 break; |
| 989 case kArm64Int64ToFloat64: | 992 case kArm64Int64ToFloat64: |
| 990 __ Scvtf(i.OutputDoubleRegister(), i.InputRegister64(0)); | 993 __ Scvtf(i.OutputDoubleRegister(), i.InputRegister64(0)); |
| 991 break; | 994 break; |
| 992 case kArm64Uint32ToFloat64: | 995 case kArm64Uint32ToFloat64: |
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| 1517 padding_size -= kInstructionSize; | 1520 padding_size -= kInstructionSize; |
| 1518 } | 1521 } |
| 1519 } | 1522 } |
| 1520 } | 1523 } |
| 1521 | 1524 |
| 1522 #undef __ | 1525 #undef __ |
| 1523 | 1526 |
| 1524 } // namespace compiler | 1527 } // namespace compiler |
| 1525 } // namespace internal | 1528 } // namespace internal |
| 1526 } // namespace v8 | 1529 } // namespace v8 |
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