Uses slt and sltu for signed vs. unsigned comparison by the MIPS assembler.

runtime/vm/assembler_mips.h

Index: runtime/vm/assembler_mips.h
===================================================================
--- runtime/vm/assembler_mips.h	(revision 22131)
+++ runtime/vm/assembler_mips.h	(working copy)
@@ -709,70 +709,82 @@
     bne(rd, CMPRES, l);
   }
 
-  void BranchGreater(Register rd, int32_t value, Label* l) {
-    if (Utils::IsInt(kImmBits, -value)) {
-      addiu(CMPRES, rd, Immediate(-value));
-      bgtz(CMPRES, l);
-    } else {
-      LoadImmediate(CMPRES, value);
-      subu(CMPRES, rd, CMPRES);
-      bgtz(CMPRES, l);
-    }
+  void BranchSignedGreater(Register rd, Register rs, Label* l) {
+    slt(CMPRES, rs, rd);  // CMPRES = rd > rs ? 1 : 0.
+    bne(CMPRES, ZR, l);
   }
 
+  void BranchSignedGreater(Register rd, int32_t value, Label* l) {
+    LoadImmediate(CMPRES, value);
+    BranchSignedGreater(rd, CMPRES, l);
+  }
+
   void BranchGreater(Register rd, Register rs, Label* l) {

[regis, 2013/04/30 00:14:50]

I suppose this is an unsigned compare?

The name is misleading if you are used to Intel terminology: 'less' and
'greater' imply signed comparison, whereas 'below' and 'above' imply unsigned
comparison.
The terms 'lower' and 'higher' ('or same') are used for unsigned comparison on
ARM.

I think we could avoid future bugs if we make this explicit
(BranchUnsignedGreater) or if we use the Intel conventions (BranchAbove).

 

[zra, 2013/04/30 00:30:07]

Done.

-    subu(CMPRES, rd, rs);
-    bgtz(CMPRES, l);
+    sltu(CMPRES, rs, rd);
+    bne(CMPRES, ZR, l);
   }
 
-  void BranchGreaterEqual(Register rd, int32_t value, Label* l) {
-    if (Utils::IsInt(kImmBits, -value)) {
-      addiu(CMPRES, rd, Immediate(-value));
-      bgez(CMPRES, l);
-    } else {
-      LoadImmediate(CMPRES, value);
-      subu(CMPRES, rd, CMPRES);
-      bgez(CMPRES, l);
-    }
+  void BranchGreater(Register rd, int32_t value, Label* l) {
+    LoadImmediate(CMPRES, value);
+    BranchGreater(rd, CMPRES, l);
   }
 
+  void BranchSignedGreaterEqual(Register rd, Register rs, Label* l) {
+    slt(CMPRES, rd, rs);  // CMPRES = rd < rs ? 1 : 0.
+    beq(CMPRES, ZR, l);  // If CMPRES = 0, then rd >= rs.
+  }
+
+  void BranchSignedGreaterEqual(Register rd, int32_t value, Label* l) {
+    LoadImmediate(CMPRES, value);
+    BranchSignedGreaterEqual(rd, CMPRES, l);
+  }
+
   void BranchGreaterEqual(Register rd, Register rs, Label* l) {
-    subu(CMPRES, rd, rs);
-    bgez(CMPRES, l);
+    sltu(CMPRES, rd, rs);  // CMPRES = rd < rs ? 1 : 0.
+    beq(CMPRES, ZR, l);
   }
 
-  void BranchLess(Register rd, int32_t value, Label* l) {
-    if (Utils::IsInt(kImmBits, -value)) {
-      addiu(CMPRES, rd, Immediate(-value));
-      bltz(CMPRES, l);
-    } else {
-      LoadImmediate(CMPRES, value);
-      subu(CMPRES, rd, CMPRES);
-      bltz(CMPRES, l);
-    }
+  void BranchGreaterEqual(Register rd, int32_t value, Label* l) {
+    LoadImmediate(CMPRES, value);
+    BranchGreaterEqual(rd, CMPRES, l);
   }
 
+  void BranchSignedLess(Register rd, Register rs, Label* l) {
+    BranchSignedGreater(rs, rd, l);
+  }
+
+  void BranchSignedLess(Register rd, int32_t value, Label* l) {
+    LoadImmediate(CMPRES, value);
+    BranchSignedGreater(CMPRES, rd, l);
+  }
+
   void BranchLess(Register rd, Register rs, Label* l) {
-    subu(CMPRES, rd, rs);
-    bltz(CMPRES, l);
+    BranchGreater(rs, rd, l);
   }
 
-  void BranchLessEqual(Register rd, int32_t value, Label* l) {
-    if (Utils::IsInt(kImmBits, -value)) {
-      addiu(CMPRES, rd, Immediate(-value));
-      blez(CMPRES, l);
-    } else {
-      LoadImmediate(CMPRES, value);
-      subu(CMPRES, rd, CMPRES);
-      blez(CMPRES, l);
-    }
+  void BranchLess(Register rd, int32_t value, Label* l) {
+    LoadImmediate(CMPRES, value);
+    BranchGreater(CMPRES, rd, l);
   }
 
+  void BranchSignedLessEqual(Register rd, Register rs, Label* l) {
+    BranchSignedGreaterEqual(rs, rd, l);
+  }
+
+  void BranchSignedLessEqual(Register rd, int32_t value, Label* l) {
+    LoadImmediate(CMPRES, value);
+    BranchSignedGreaterEqual(CMPRES, rd, l);
+  }
+
   void BranchLessEqual(Register rd, Register rs, Label* l) {
-    subu(CMPRES, rd, rs);
-    blez(CMPRES, l);
+    BranchGreaterEqual(rs, rd, l);
   }
 
+  void BranchLessEqual(Register rd, int32_t value, Label* l) {
+    LoadImmediate(CMPRES, value);
+    BranchGreaterEqual(CMPRES, rd, l);
+  }
+
   void Push(Register rt) {
     addiu(SP, SP, Immediate(-kWordSize));
     sw(rt, Address(SP));