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| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 #ifndef VM_ASSEMBLER_MIPS_H_ | 5 #ifndef VM_ASSEMBLER_MIPS_H_ |
| 6 #define VM_ASSEMBLER_MIPS_H_ | 6 #define VM_ASSEMBLER_MIPS_H_ |
| 7 | 7 |
| 8 #ifndef VM_ASSEMBLER_H_ | 8 #ifndef VM_ASSEMBLER_H_ |
| 9 #error Do not include assembler_mips.h directly; use assembler.h instead. | 9 #error Do not include assembler_mips.h directly; use assembler.h instead. |
| 10 #endif | 10 #endif |
| (...skipping 691 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 702 LoadImmediate(CMPRES, value); | 702 LoadImmediate(CMPRES, value); |
| 703 bne(rd, CMPRES, l); | 703 bne(rd, CMPRES, l); |
| 704 } | 704 } |
| 705 | 705 |
| 706 void BranchNotEqual(Register rd, const Object& object, Label* l) { | 706 void BranchNotEqual(Register rd, const Object& object, Label* l) { |
| 707 ASSERT(rd != CMPRES); | 707 ASSERT(rd != CMPRES); |
| 708 LoadObject(CMPRES, object); | 708 LoadObject(CMPRES, object); |
| 709 bne(rd, CMPRES, l); | 709 bne(rd, CMPRES, l); |
| 710 } | 710 } |
| 711 | 711 |
| 712 void BranchGreater(Register rd, int32_t value, Label* l) { | 712 void BranchSignedGreater(Register rd, Register rs, Label* l) { |
| 713 if (Utils::IsInt(kImmBits, -value)) { | 713 slt(CMPRES, rs, rd); // CMPRES = rd > rs ? 1 : 0. |
| 714 addiu(CMPRES, rd, Immediate(-value)); | 714 bne(CMPRES, ZR, l); |
| 715 bgtz(CMPRES, l); | |
| 716 } else { | |
| 717 LoadImmediate(CMPRES, value); | |
| 718 subu(CMPRES, rd, CMPRES); | |
| 719 bgtz(CMPRES, l); | |
| 720 } | |
| 721 } | 715 } |
| 722 | 716 |
| 723 void BranchGreater(Register rd, Register rs, Label* l) { | 717 void BranchSignedGreater(Register rd, int32_t value, Label* l) { |
| 724 subu(CMPRES, rd, rs); | 718 LoadImmediate(CMPRES, value); |
| 725 bgtz(CMPRES, l); | 719 BranchSignedGreater(rd, CMPRES, l); |
| 726 } | 720 } |
| 727 | 721 |
| 728 void BranchGreaterEqual(Register rd, int32_t value, Label* l) { | 722 void BranchUnsignedGreater(Register rd, Register rs, Label* l) { |
| 729 if (Utils::IsInt(kImmBits, -value)) { | 723 sltu(CMPRES, rs, rd); |
| 730 addiu(CMPRES, rd, Immediate(-value)); | 724 bne(CMPRES, ZR, l); |
| 731 bgez(CMPRES, l); | |
| 732 } else { | |
| 733 LoadImmediate(CMPRES, value); | |
| 734 subu(CMPRES, rd, CMPRES); | |
| 735 bgez(CMPRES, l); | |
| 736 } | |
| 737 } | 725 } |
| 738 | 726 |
| 739 void BranchGreaterEqual(Register rd, Register rs, Label* l) { | 727 void BranchUnsignedGreater(Register rd, int32_t value, Label* l) { |
| 740 subu(CMPRES, rd, rs); | 728 LoadImmediate(CMPRES, value); |
| 741 bgez(CMPRES, l); | 729 BranchUnsignedGreater(rd, CMPRES, l); |
| 742 } | 730 } |
| 743 | 731 |
| 744 void BranchLess(Register rd, int32_t value, Label* l) { | 732 void BranchSignedGreaterEqual(Register rd, Register rs, Label* l) { |
| 745 if (Utils::IsInt(kImmBits, -value)) { | 733 slt(CMPRES, rd, rs); // CMPRES = rd < rs ? 1 : 0. |
| 746 addiu(CMPRES, rd, Immediate(-value)); | 734 beq(CMPRES, ZR, l); // If CMPRES = 0, then rd >= rs. |
| 747 bltz(CMPRES, l); | |
| 748 } else { | |
| 749 LoadImmediate(CMPRES, value); | |
| 750 subu(CMPRES, rd, CMPRES); | |
| 751 bltz(CMPRES, l); | |
| 752 } | |
| 753 } | 735 } |
| 754 | 736 |
| 755 void BranchLess(Register rd, Register rs, Label* l) { | 737 void BranchSignedGreaterEqual(Register rd, int32_t value, Label* l) { |
| 756 subu(CMPRES, rd, rs); | 738 LoadImmediate(CMPRES, value); |
| 757 bltz(CMPRES, l); | 739 BranchSignedGreaterEqual(rd, CMPRES, l); |
| 758 } | 740 } |
| 759 | 741 |
| 760 void BranchLessEqual(Register rd, int32_t value, Label* l) { | 742 void BranchUnsignedGreaterEqual(Register rd, Register rs, Label* l) { |
| 761 if (Utils::IsInt(kImmBits, -value)) { | 743 sltu(CMPRES, rd, rs); // CMPRES = rd < rs ? 1 : 0. |
| 762 addiu(CMPRES, rd, Immediate(-value)); | 744 beq(CMPRES, ZR, l); |
| 763 blez(CMPRES, l); | |
| 764 } else { | |
| 765 LoadImmediate(CMPRES, value); | |
| 766 subu(CMPRES, rd, CMPRES); | |
| 767 blez(CMPRES, l); | |
| 768 } | |
| 769 } | 745 } |
| 770 | 746 |
| 771 void BranchLessEqual(Register rd, Register rs, Label* l) { | 747 void BranchUnsignedGreaterEqual(Register rd, int32_t value, Label* l) { |
| 772 subu(CMPRES, rd, rs); | 748 LoadImmediate(CMPRES, value); |
| 773 blez(CMPRES, l); | 749 BranchUnsignedGreaterEqual(rd, CMPRES, l); |
| 750 } |
| 751 |
| 752 void BranchSignedLess(Register rd, Register rs, Label* l) { |
| 753 BranchSignedGreater(rs, rd, l); |
| 754 } |
| 755 |
| 756 void BranchSignedLess(Register rd, int32_t value, Label* l) { |
| 757 LoadImmediate(CMPRES, value); |
| 758 BranchSignedGreater(CMPRES, rd, l); |
| 759 } |
| 760 |
| 761 void BranchUnsignedLess(Register rd, Register rs, Label* l) { |
| 762 BranchUnsignedGreater(rs, rd, l); |
| 763 } |
| 764 |
| 765 void BranchUnsignedLess(Register rd, int32_t value, Label* l) { |
| 766 LoadImmediate(CMPRES, value); |
| 767 BranchUnsignedGreater(CMPRES, rd, l); |
| 768 } |
| 769 |
| 770 void BranchSignedLessEqual(Register rd, Register rs, Label* l) { |
| 771 BranchSignedGreaterEqual(rs, rd, l); |
| 772 } |
| 773 |
| 774 void BranchSignedLessEqual(Register rd, int32_t value, Label* l) { |
| 775 LoadImmediate(CMPRES, value); |
| 776 BranchSignedGreaterEqual(CMPRES, rd, l); |
| 777 } |
| 778 |
| 779 void BranchUnsignedLessEqual(Register rd, Register rs, Label* l) { |
| 780 BranchUnsignedGreaterEqual(rs, rd, l); |
| 781 } |
| 782 |
| 783 void BranchUnsignedLessEqual(Register rd, int32_t value, Label* l) { |
| 784 LoadImmediate(CMPRES, value); |
| 785 BranchUnsignedGreaterEqual(CMPRES, rd, l); |
| 774 } | 786 } |
| 775 | 787 |
| 776 void Push(Register rt) { | 788 void Push(Register rt) { |
| 777 addiu(SP, SP, Immediate(-kWordSize)); | 789 addiu(SP, SP, Immediate(-kWordSize)); |
| 778 sw(rt, Address(SP)); | 790 sw(rt, Address(SP)); |
| 779 } | 791 } |
| 780 | 792 |
| 781 void Pop(Register rt) { | 793 void Pop(Register rt) { |
| 782 lw(rt, Address(SP)); | 794 lw(rt, Address(SP)); |
| 783 addiu(SP, SP, Immediate(kWordSize)); | 795 addiu(SP, SP, Immediate(kWordSize)); |
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| 989 Register value, | 1001 Register value, |
| 990 Label* no_update); | 1002 Label* no_update); |
| 991 | 1003 |
| 992 DISALLOW_ALLOCATION(); | 1004 DISALLOW_ALLOCATION(); |
| 993 DISALLOW_COPY_AND_ASSIGN(Assembler); | 1005 DISALLOW_COPY_AND_ASSIGN(Assembler); |
| 994 }; | 1006 }; |
| 995 | 1007 |
| 996 } // namespace dart | 1008 } // namespace dart |
| 997 | 1009 |
| 998 #endif // VM_ASSEMBLER_MIPS_H_ | 1010 #endif // VM_ASSEMBLER_MIPS_H_ |
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