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Side by Side Diff: runtime/vm/stub_code_mips.cc

Issue 14556002: Uses slt and sltu for signed vs. unsigned comparison by the MIPS assembler. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 7 years, 7 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_MIPS) 6 #if defined(TARGET_ARCH_MIPS)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/code_generator.h" 9 #include "vm/code_generator.h"
10 #include "vm/compiler.h" 10 #include "vm/compiler.h"
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279 // T2: address of first argument in array. 279 // T2: address of first argument in array.
280 Label loop, loop_condition; 280 Label loop, loop_condition;
281 __ b(&loop_condition); 281 __ b(&loop_condition);
282 __ Bind(&loop); 282 __ Bind(&loop);
283 __ lw(TMP, Address(T1)); 283 __ lw(TMP, Address(T1));
284 __ sw(TMP, Address(T2)); 284 __ sw(TMP, Address(T2));
285 __ AddImmediate(T1, -kWordSize); 285 __ AddImmediate(T1, -kWordSize);
286 __ AddImmediate(T2, kWordSize); 286 __ AddImmediate(T2, kWordSize);
287 __ Bind(&loop_condition); 287 __ Bind(&loop_condition);
288 __ AddImmediate(A1, -Smi::RawValue(1)); // A1 is Smi. 288 __ AddImmediate(A1, -Smi::RawValue(1)); // A1 is Smi.
289 __ BranchGreaterEqual(A1, ZR, &loop); 289 __ BranchSignedGreaterEqual(A1, ZR, &loop);
290 } 290 }
291 291
292 292
293 // Input parameters: 293 // Input parameters:
294 // S5: ic-data. 294 // S5: ic-data.
295 // S4: arguments descriptor array. 295 // S4: arguments descriptor array.
296 // Note: The receiver object is the first argument to the function being 296 // Note: The receiver object is the first argument to the function being
297 // called, the stub accesses the receiver from this location directly 297 // called, the stub accesses the receiver from this location directly
298 // when trying to resolve the call. 298 // when trying to resolve the call.
299 void StubCode::GenerateInstanceFunctionLookupStub(Assembler* assembler) { 299 void StubCode::GenerateInstanceFunctionLookupStub(Assembler* assembler) {
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799 799
800 // Set up arguments for the Dart call. 800 // Set up arguments for the Dart call.
801 Label push_arguments; 801 Label push_arguments;
802 Label done_push_arguments; 802 Label done_push_arguments;
803 __ beq(T1, ZR, &done_push_arguments); // check if there are arguments. 803 __ beq(T1, ZR, &done_push_arguments); // check if there are arguments.
804 __ mov(A1, ZR); 804 __ mov(A1, ZR);
805 __ Bind(&push_arguments); 805 __ Bind(&push_arguments);
806 __ lw(A3, Address(A2)); 806 __ lw(A3, Address(A2));
807 __ Push(A3); 807 __ Push(A3);
808 __ addiu(A1, A1, Immediate(1)); 808 __ addiu(A1, A1, Immediate(1));
809 __ BranchLess(A1, T1, &push_arguments); 809 __ BranchSignedLess(A1, T1, &push_arguments);
810 __ delay_slot()->addiu(A2, A2, Immediate(kWordSize)); 810 __ delay_slot()->addiu(A2, A2, Immediate(kWordSize));
811 811
812 __ Bind(&done_push_arguments); 812 __ Bind(&done_push_arguments);
813 813
814 // Call the Dart code entrypoint. 814 // Call the Dart code entrypoint.
815 __ jalr(A0); // S4 is the arguments descriptor array. 815 __ jalr(A0); // S4 is the arguments descriptor array.
816 __ TraceSimMsg("InvokeDartCodeStub return"); 816 __ TraceSimMsg("InvokeDartCodeStub return");
817 817
818 // Read the saved new Context pointer. 818 // Read the saved new Context pointer.
819 __ lw(CTX, Address(FP, kNewContextOffset)); 819 __ lw(CTX, Address(FP, kNewContextOffset));
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1396 __ lw(S4, Address(SP, 2 * kWordSize)); // Restore. 1396 __ lw(S4, Address(SP, 2 * kWordSize)); // Restore.
1397 __ lw(S5, Address(SP, 3 * kWordSize)); 1397 __ lw(S5, Address(SP, 3 * kWordSize));
1398 __ lw(T0, Address(SP, 4 * kWordSize)); 1398 __ lw(T0, Address(SP, 4 * kWordSize));
1399 __ addiu(SP, SP, Immediate(5 * kWordSize)); // Discard argument; 1399 __ addiu(SP, SP, Immediate(5 * kWordSize)); // Discard argument;
1400 __ LeaveStubFrame(); 1400 __ LeaveStubFrame();
1401 } 1401 }
1402 __ lw(T7, FieldAddress(func_reg, Function::usage_counter_offset())); 1402 __ lw(T7, FieldAddress(func_reg, Function::usage_counter_offset()));
1403 Label is_hot; 1403 Label is_hot;
1404 if (FlowGraphCompiler::CanOptimize()) { 1404 if (FlowGraphCompiler::CanOptimize()) {
1405 ASSERT(FLAG_optimization_counter_threshold > 1); 1405 ASSERT(FLAG_optimization_counter_threshold > 1);
1406 __ BranchGreaterEqual(T7, FLAG_optimization_counter_threshold, &is_hot); 1406 __ BranchSignedGreaterEqual(T7, FLAG_optimization_counter_threshold,
1407 &is_hot);
1407 // As long as VM has no OSR do not optimize in the middle of the function 1408 // As long as VM has no OSR do not optimize in the middle of the function
1408 // but only at exit so that we have collected all type feedback before 1409 // but only at exit so that we have collected all type feedback before
1409 // optimizing. 1410 // optimizing.
1410 } 1411 }
1411 __ addiu(T7, T7, Immediate(1)); 1412 __ addiu(T7, T7, Immediate(1));
1412 __ sw(T7, FieldAddress(func_reg, Function::usage_counter_offset())); 1413 __ sw(T7, FieldAddress(func_reg, Function::usage_counter_offset()));
1413 __ Bind(&is_hot); 1414 __ Bind(&is_hot);
1414 } 1415 }
1415 1416
1416 1417
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2116 __ Bind(&done); 2117 __ Bind(&done);
2117 __ lw(T0, Address(SP, 0 * kWordSize)); 2118 __ lw(T0, Address(SP, 0 * kWordSize));
2118 __ lw(T1, Address(SP, 1 * kWordSize)); 2119 __ lw(T1, Address(SP, 1 * kWordSize));
2119 __ Ret(); 2120 __ Ret();
2120 __ delay_slot()->addiu(SP, SP, Immediate(2 * kWordSize)); 2121 __ delay_slot()->addiu(SP, SP, Immediate(2 * kWordSize));
2121 } 2122 }
2122 2123
2123 } // namespace dart 2124 } // namespace dart
2124 2125
2125 #endif // defined TARGET_ARCH_MIPS 2126 #endif // defined TARGET_ARCH_MIPS
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