Ducking fix #1:Initial refactoring preparing for further AEC work (changes are bitexact).

webrtc/modules/audio_processing/aec/aec_core_mips.c

 /*
  *  Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
  *
  *  Use of this source code is governed by a BSD-style license
  *  that can be found in the LICENSE file in the root of the source
  *  tree. An additional intellectual property rights grant can be found
  *  in the file PATENTS.  All contributing project authors may
  *  be found in the AUTHORS file in the root of the source tree.
  */
 
@@ skipping 681 matching lines @@
       "swc1      %[temp4],    -4(%[p_efw1])            \n\t"
       : [temp1] "=&f" (temp1), [temp2] "=&f" (temp2), [temp3] "=&f" (temp3),
         [temp4] "=&f" (temp4), [p_efw0] "+r" (p_efw0), [p_efw1] "+r" (p_efw1),
         [p_hNl] "+r" (p_hNl)
       :
       : "memory"
     );
   }
 }
 
-void WebRtcAec_ScaleErrorSignal_mips(AecCore* aec, float ef[2][PART_LEN1]) {
-  const float mu = aec->extended_filter_enabled ? kExtendedMu : aec->normal_mu;
-  const float error_threshold = aec->extended_filter_enabled
+void WebRtcAec_ScaleErrorSignal_mips(int extended_filter_enabled,
+                                     float normal_mu,
+                                     float normal_error_threshold,
+                                     float *x_pow,
+                                     float ef[2][PART_LEN1]) {
+  const float mu = extended_filter_enabled ? kExtendedMu : normal_mu;
+  const float error_threshold = extended_filter_enabled
                                     ? kExtendedErrorThreshold
-                                    : aec->normal_error_threshold;
+                                    : normal_error_threshold;
   int len = (PART_LEN1);
   float* ef0 = ef[0];
   float* ef1 = ef[1];
-  float* xPow = aec->xPow;
   float fac1 = 1e-10f;
   float err_th2 = error_threshold * error_threshold;
   float f0, f1, f2;
 #if !defined(MIPS32_R2_LE)
   float f3;
 #endif
 
   __asm __volatile (
     ".set       push                                   \n\t"
     ".set       noreorder                              \n\t"
    "1:                                                 \n\t"
-    "lwc1       %[f0],     0(%[xPow])                  \n\t"
+    "lwc1       %[f0],     0(%[x_pow])                  \n\t"
     "lwc1       %[f1],     0(%[ef0])                   \n\t"
     "lwc1       %[f2],     0(%[ef1])                   \n\t"
     "add.s      %[f0],     %[f0],       %[fac1]        \n\t"
     "div.s      %[f1],     %[f1],       %[f0]          \n\t"
     "div.s      %[f2],     %[f2],       %[f0]          \n\t"
     "mul.s      %[f0],     %[f1],       %[f1]          \n\t"
 #if defined(MIPS32_R2_LE)
     "madd.s     %[f0],     %[f0],       %[f2],   %[f2] \n\t"
 #else
     "mul.s      %[f3],     %[f2],       %[f2]          \n\t"
     "add.s      %[f0],     %[f0],       %[f3]          \n\t"
 #endif
     "c.le.s     %[f0],     %[err_th2]                  \n\t"
     "nop                                               \n\t"
     "bc1t       2f                                     \n\t"
     " nop                                              \n\t"
     "sqrt.s     %[f0],     %[f0]                       \n\t"
     "add.s      %[f0],     %[f0],       %[fac1]        \n\t"
     "div.s      %[f0],     %[err_th],   %[f0]          \n\t"
     "mul.s      %[f1],     %[f1],       %[f0]          \n\t"
     "mul.s      %[f2],     %[f2],       %[f0]          \n\t"
    "2:                                                 \n\t"
     "mul.s      %[f1],     %[f1],       %[mu]          \n\t"
     "mul.s      %[f2],     %[f2],       %[mu]          \n\t"
     "swc1       %[f1],     0(%[ef0])                   \n\t"
     "swc1       %[f2],     0(%[ef1])                   \n\t"
     "addiu      %[len],    %[len],      -1             \n\t"
-    "addiu      %[xPow],   %[xPow],     4              \n\t"
+    "addiu      %[x_pow],   %[x_pow],     4              \n\t"
     "addiu      %[ef0],    %[ef0],      4              \n\t"
     "bgtz       %[len],    1b                          \n\t"
     " addiu     %[ef1],    %[ef1],      4              \n\t"
     ".set       pop                                    \n\t"
     : [f0] "=&f" (f0), [f1] "=&f" (f1), [f2] "=&f" (f2),
 #if !defined(MIPS32_R2_LE)
       [f3] "=&f" (f3),
 #endif
-      [xPow] "+r" (xPow), [ef0] "+r" (ef0), [ef1] "+r" (ef1),
+      [x_pow] "+r" (x_pow), [ef0] "+r" (ef0), [ef1] "+r" (ef1),
       [len] "+r" (len)
     : [fac1] "f" (fac1), [err_th2] "f" (err_th2), [mu] "f" (mu),
       [err_th] "f" (error_threshold)
     : "memory"
   );
 }
 
 void WebRtcAec_InitAec_mips(void) {
   WebRtcAec_FilterFar = WebRtcAec_FilterFar_mips;
   WebRtcAec_FilterAdaptation = WebRtcAec_FilterAdaptation_mips;
   WebRtcAec_ScaleErrorSignal = WebRtcAec_ScaleErrorSignal_mips;
   WebRtcAec_ComfortNoise = WebRtcAec_ComfortNoise_mips;
   WebRtcAec_OverdriveAndSuppress = WebRtcAec_OverdriveAndSuppress_mips;
 }
-