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1 //===- subzero/src/IceTargetLoweringARM32.cpp - ARM32 lowering ------------===// | 1 //===- subzero/src/IceTargetLoweringARM32.cpp - ARM32 lowering ------------===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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231 Hi->setMustHaveReg(); | 231 Hi->setMustHaveReg(); |
232 } | 232 } |
233 } | 233 } |
234 } // end of anonymous namespace | 234 } // end of anonymous namespace |
235 | 235 |
236 void TargetARM32::translateO2() { | 236 void TargetARM32::translateO2() { |
237 TimerMarker T(TimerStack::TT_O2, Func); | 237 TimerMarker T(TimerStack::TT_O2, Func); |
238 | 238 |
239 // TODO(stichnot): share passes with X86? | 239 // TODO(stichnot): share passes with X86? |
240 // https://code.google.com/p/nativeclient/issues/detail?id=4094 | 240 // https://code.google.com/p/nativeclient/issues/detail?id=4094 |
| 241 genTargetHelperCalls(); |
241 | 242 |
242 // Do not merge Alloca instructions, and lay out the stack. | 243 // Do not merge Alloca instructions, and lay out the stack. |
243 static constexpr bool SortAndCombineAllocas = false; | 244 static constexpr bool SortAndCombineAllocas = false; |
244 Func->processAllocas(SortAndCombineAllocas); | 245 Func->processAllocas(SortAndCombineAllocas); |
245 Func->dump("After Alloca processing"); | 246 Func->dump("After Alloca processing"); |
246 | 247 |
247 if (!Ctx->getFlags().getPhiEdgeSplit()) { | 248 if (!Ctx->getFlags().getPhiEdgeSplit()) { |
248 // Lower Phi instructions. | 249 // Lower Phi instructions. |
249 Func->placePhiLoads(); | 250 Func->placePhiLoads(); |
250 if (Func->hasError()) | 251 if (Func->hasError()) |
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337 // Nop insertion | 338 // Nop insertion |
338 if (Ctx->getFlags().shouldDoNopInsertion()) { | 339 if (Ctx->getFlags().shouldDoNopInsertion()) { |
339 Func->doNopInsertion(); | 340 Func->doNopInsertion(); |
340 } | 341 } |
341 } | 342 } |
342 | 343 |
343 void TargetARM32::translateOm1() { | 344 void TargetARM32::translateOm1() { |
344 TimerMarker T(TimerStack::TT_Om1, Func); | 345 TimerMarker T(TimerStack::TT_Om1, Func); |
345 | 346 |
346 // TODO: share passes with X86? | 347 // TODO: share passes with X86? |
| 348 genTargetHelperCalls(); |
347 | 349 |
348 // Do not merge Alloca instructions, and lay out the stack. | 350 // Do not merge Alloca instructions, and lay out the stack. |
349 static constexpr bool SortAndCombineAllocas = false; | 351 static constexpr bool SortAndCombineAllocas = false; |
350 Func->processAllocas(SortAndCombineAllocas); | 352 Func->processAllocas(SortAndCombineAllocas); |
351 Func->dump("After Alloca processing"); | 353 Func->dump("After Alloca processing"); |
352 | 354 |
353 Func->placePhiLoads(); | 355 Func->placePhiLoads(); |
354 if (Func->hasError()) | 356 if (Func->hasError()) |
355 return; | 357 return; |
356 Func->placePhiStores(); | 358 Func->placePhiStores(); |
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5381 // Technically R9 is used for TLS with Sandboxing, and we reserve it. | 5383 // Technically R9 is used for TLS with Sandboxing, and we reserve it. |
5382 // However, for compatibility with current NaCl LLVM, don't claim that. | 5384 // However, for compatibility with current NaCl LLVM, don't claim that. |
5383 Str << ".eabi_attribute 14, 3 @ Tag_ABI_PCS_R9_use: Not used\n"; | 5385 Str << ".eabi_attribute 14, 3 @ Tag_ABI_PCS_R9_use: Not used\n"; |
5384 } | 5386 } |
5385 | 5387 |
5386 llvm::SmallBitVector TargetARM32::TypeToRegisterSet[IceType_NUM]; | 5388 llvm::SmallBitVector TargetARM32::TypeToRegisterSet[IceType_NUM]; |
5387 llvm::SmallBitVector TargetARM32::RegisterAliases[RegARM32::Reg_NUM]; | 5389 llvm::SmallBitVector TargetARM32::RegisterAliases[RegARM32::Reg_NUM]; |
5388 llvm::SmallBitVector TargetARM32::ScratchRegs; | 5390 llvm::SmallBitVector TargetARM32::ScratchRegs; |
5389 | 5391 |
5390 } // end of namespace Ice | 5392 } // end of namespace Ice |
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