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Side by Side Diff: src/IceTargetLoweringX8664.cpp

Issue 1452993002: Subzero: Fix build warnings/errors under g++. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 5 years, 1 month ago
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1 //===- subzero/src/IceTargetLoweringX8664.cpp - x86-64 lowering -----------===// 1 //===- subzero/src/IceTargetLoweringX8664.cpp - x86-64 lowering -----------===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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81 }; 81 };
82 82
83 const size_t MachineTraits<TargetX8664>::TableTypeX8664AttributesSize = 83 const size_t MachineTraits<TargetX8664>::TableTypeX8664AttributesSize =
84 llvm::array_lengthof(TableTypeX8664Attributes); 84 llvm::array_lengthof(TableTypeX8664Attributes);
85 85
86 const uint32_t MachineTraits<TargetX8664>::X86_STACK_ALIGNMENT_BYTES = 16; 86 const uint32_t MachineTraits<TargetX8664>::X86_STACK_ALIGNMENT_BYTES = 16;
87 const char *MachineTraits<TargetX8664>::TargetName = "X8664"; 87 const char *MachineTraits<TargetX8664>::TargetName = "X8664";
88 88
89 template <> 89 template <>
90 std::array<llvm::SmallBitVector, RCX86_NUM> 90 std::array<llvm::SmallBitVector, RCX86_NUM>
91 TargetX86Base<TargetX8664>::TypeToRegisterSet = {}; 91 TargetX86Base<TargetX8664>::TypeToRegisterSet = {{}};
92 92
93 template <> 93 template <>
94 std::array<llvm::SmallBitVector, 94 std::array<llvm::SmallBitVector,
95 TargetX86Base<TargetX8664>::Traits::RegisterSet::Reg_NUM> 95 TargetX86Base<TargetX8664>::Traits::RegisterSet::Reg_NUM>
96 TargetX86Base<TargetX8664>::RegisterAliases = {}; 96 TargetX86Base<TargetX8664>::RegisterAliases = {{}};
97 97
98 template <> 98 template <>
99 llvm::SmallBitVector 99 llvm::SmallBitVector
100 TargetX86Base<TargetX8664>::ScratchRegs = llvm::SmallBitVector(); 100 TargetX86Base<TargetX8664>::ScratchRegs = llvm::SmallBitVector();
101 101
102 } // end of namespace X86Internal 102 } // end of namespace X86Internal
103 103
104 //------------------------------------------------------------------------------ 104 //------------------------------------------------------------------------------
105 // __ ______ __ __ ______ ______ __ __ __ ______ 105 // __ ______ __ __ ______ ______ __ __ __ ______
106 // /\ \ /\ __ \/\ \ _ \ \/\ ___\/\ == \/\ \/\ "-.\ \/\ ___\ 106 // /\ \ /\ __ \/\ \ _ \ \/\ ___\/\ == \/\ \/\ "-.\ \/\ ___\
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966 // case the high-level table has extra entries. 966 // case the high-level table has extra entries.
967 #define X(tag, sizeLog2, align, elts, elty, str) \ 967 #define X(tag, sizeLog2, align, elts, elty, str) \
968 static_assert(_table1_##tag == _table2_##tag, \ 968 static_assert(_table1_##tag == _table2_##tag, \
969 "Inconsistency between ICETYPEX8664_TABLE and ICETYPE_TABLE"); 969 "Inconsistency between ICETYPEX8664_TABLE and ICETYPE_TABLE");
970 ICETYPE_TABLE 970 ICETYPE_TABLE
971 #undef X 971 #undef X
972 } // end of namespace dummy3 972 } // end of namespace dummy3
973 } // end of anonymous namespace 973 } // end of anonymous namespace
974 974
975 } // end of namespace Ice 975 } // end of namespace Ice
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