Add BL (immediate) and BLX (register) to ARM assembler.

src/IceInstARM32.h

 //===- subzero/src/IceInstARM32.h - ARM32 machine instructions --*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 1005 matching lines @@
   InstARM32Call(const InstARM32Call &) = delete;
   InstARM32Call &operator=(const InstARM32Call &) = delete;
 
 public:
   static InstARM32Call *create(Cfg *Func, Variable *Dest, Operand *CallTarget) {
     return new (Func->allocate<InstARM32Call>())
         InstARM32Call(Func, Dest, CallTarget);
   }
   Operand *getCallTarget() const { return getSrc(0); }
   void emit(const Cfg *Func) const override;
+  void emitIAS(const Cfg *Func) const override;
   void dump(const Cfg *Func) const override;
   static bool classof(const Inst *Inst) { return isClassof(Inst, Call); }
 
 private:
   InstARM32Call(Cfg *Func, Variable *Dest, Operand *CallTarget);
 };
 
 /// Pop into a list of GPRs. Technically this can be predicated, but we don't
 /// need that functionality.
 class InstARM32Pop : public InstARM32 {
@@ skipping 310 matching lines @@
 // default implementations. Without this, there is the possibility of ODR
 // violations and link errors.
 
 template <> void InstARM32Ldr::emit(const Cfg *Func) const;
 template <> void InstARM32Movw::emit(const Cfg *Func) const;
 template <> void InstARM32Movt::emit(const Cfg *Func) const;
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEINSTARM32_H