Add BL (immediate) and BLX (register) to ARM assembler.

src/IceAssemblerARM32.h

 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===//
 //
 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // Modified by the Subzero authors.
 //
 //===----------------------------------------------------------------------===//
 //
@@ skipping 27 matching lines @@
 namespace Ice {
 namespace ARM32 {
 
 /// Encoding of an ARM 32-bit instruction.
 using IValueT = uint32_t;
 
 /// An Offset value (+/-) used in an ARM 32-bit instruction.
 using IOffsetT = int32_t;
 
 /// Handles encoding of bottom/top 16 bits of an address using movw/movt.
-class MoveRelocatableFixup : public AssemblerFixup {
+class MoveRelocatableFixup final : public AssemblerFixup {
   MoveRelocatableFixup &operator=(const MoveRelocatableFixup &) = delete;
   MoveRelocatableFixup(const MoveRelocatableFixup &) = default;
 
 public:
   MoveRelocatableFixup() = default;
-  size_t emit(GlobalContext *Ctx, const Assembler &Asm) const override;
+  size_t emit(GlobalContext *Ctx, const Assembler &Asm) const final;
+};
+
+/// Handles encoding of branch and link to global location.
+class BlRelocatableFixup final : public AssemblerFixup {
+  BlRelocatableFixup(const BlRelocatableFixup &) = delete;
+  BlRelocatableFixup &operator=(const BlRelocatableFixup &) = delete;
+
+public:
+  BlRelocatableFixup() = default;
+  size_t emit(GlobalContext *Ctx, const Assembler &Asm) const final;
 };
 
 class AssemblerARM32 : public Assembler {
   AssemblerARM32(const AssemblerARM32 &) = delete;
   AssemblerARM32 &operator=(const AssemblerARM32 &) = delete;
 
 public:
   // Rotation values.
   enum RotationValue {
     kRotateNone, // Omitted
@@ skipping 31 matching lines @@
         Label->finalCheck();
       }
       for (const Label *Label : LocalLabels) {
         Label->finalCheck();
       }
     }
   }
 
   MoveRelocatableFixup *createMoveFixup(bool IsMovW, const Constant *Value);
 
+  BlRelocatableFixup *createBlFixup(const ConstantRelocatable *Target);

[Jim Stichnoth, 2015/11/22 03:27:03]

I'd be happier if we reserved variable name "Target" for a TargetLowering*. 
Better might be BrTarget or BlTarget.

[Karl, 2015/11/30 16:54:35]

Done.

+
   void alignFunction() override {
     const SizeT Align = 1 << getBundleAlignLog2Bytes();
     SizeT BytesNeeded = Utils::OffsetToAlignment(Buffer.getPosition(), Align);
     constexpr IValueT UndefinedInst = 0xe7fedef0; // udf #60896
     constexpr SizeT InstSize = sizeof(IValueT);
     assert(BytesNeeded % InstARM32::InstSize == 0);
     while (BytesNeeded > 0) {
       AssemblerBuffer::EnsureCapacity ensured(&Buffer);
       emitInst(UndefinedInst);
       BytesNeeded -= InstSize;
@@ skipping 63 matching lines @@
            bool SetFlags, CondARM32::Cond Cond);
 
   void add(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
            bool SetFlags, CondARM32::Cond Cond);
 
   void and_(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
             bool SetFlags, CondARM32::Cond Cond);
 
   void b(Label *L, CondARM32::Cond Cond);
 
-  void bx(RegARM32::GPRRegister Rm, CondARM32::Cond Cond = CondARM32::AL);
-
   void bkpt(uint16_t Imm16);
 
-  void cmp(const Operand *OpRn, const Operand *OpSrc1, CondARM32::Cond Cond);
-
   void bic(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
            bool SetFlags, CondARM32::Cond Cond);
 
+  void bl(const ConstantRelocatable *Target);
+
+  void blx(const Operand *Target);
+
+  void bx(RegARM32::GPRRegister Rm, CondARM32::Cond Cond = CondARM32::AL);
+
+  void cmp(const Operand *OpRn, const Operand *OpSrc1, CondARM32::Cond Cond);
+
   void eor(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1,
            bool SetFlags, CondARM32::Cond Cond);
 
   void ldr(const Operand *OpRt, const Operand *OpAddress, CondARM32::Cond Cond,
            const TargetInfo &TInfo);
 
   void ldr(const Operand *OpRt, const Operand *OpAddress, CondARM32::Cond Cond,
            const TargetLowering *Lowering) {
     const TargetInfo TInfo(Lowering);
     ldr(OpRt, OpAddress, Cond, TInfo);
@@ skipping 160 matching lines @@
   // cccc=Cond, xxxxxxx<<21=Opcode, dddd=Rd, s=SetFlags, and
   // iiiiiiiiiiiiiiii=Imm16.
   void emitMovw(IValueT Opcode, IValueT Rd, IValueT Imm16, bool SetFlags,
                 CondARM32::Cond Cond);
 };
 
 } // end of namespace ARM32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H