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Side by Side Diff: src/DartARM32/assembler_arm.h

Issue 1452293003: Add BL (immediate) and BLX (register) to ARM assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix nits. Created 5 years, 1 month ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 // 4 //
5 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe 5 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe
6 // Please update the (git) revision if we merge changes from Dart. 6 // Please update the (git) revision if we merge changes from Dart.
7 // https://code.google.com/p/dart/wiki/GettingTheSource 7 // https://code.google.com/p/dart/wiki/GettingTheSource
8 8
9 #ifndef VM_ASSEMBLER_ARM_H_ 9 #ifndef VM_ASSEMBLER_ARM_H_
10 #define VM_ASSEMBLER_ARM_H_ 10 #define VM_ASSEMBLER_ARM_H_
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21 #include "vm/object.h" 21 #include "vm/object.h"
22 #include "vm/simulator.h" 22 #include "vm/simulator.h"
23 23
24 namespace dart { 24 namespace dart {
25 25
26 // Forward declarations. 26 // Forward declarations.
27 class RuntimeEntry; 27 class RuntimeEntry;
28 class StubEntry; 28 class StubEntry;
29 29
30 #if 0 30 #if 0
31 // Moved to: ARM32::AssemblerARM32 as needed 31 // Moved to ARM32::AssemblerARM32 as needed
32 // Instruction encoding bits. 32 // Instruction encoding bits.
33 enum { 33 enum {
34 H = 1 << 5, // halfword (or byte) 34 H = 1 << 5, // halfword (or byte)
35 L = 1 << 20, // load (or store) 35 L = 1 << 20, // load (or store)
36 S = 1 << 20, // set condition code (or leave unchanged) 36 S = 1 << 20, // set condition code (or leave unchanged)
37 W = 1 << 21, // writeback base register (or leave unchanged) 37 W = 1 << 21, // writeback base register (or leave unchanged)
38 A = 1 << 21, // accumulate in multiply instruction (or not) 38 A = 1 << 21, // accumulate in multiply instruction (or not)
39 B = 1 << 22, // unsigned byte (or word) 39 B = 1 << 22, // unsigned byte (or word)
40 D = 1 << 22, // high/lo bit of start of s/d register range 40 D = 1 << 22, // high/lo bit of start of s/d register range
41 N = 1 << 22, // long (or short) 41 N = 1 << 22, // long (or short)
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589 #endif 589 #endif
590 590
591 void ldrex(Register rd, Register rn, Condition cond = AL); 591 void ldrex(Register rd, Register rn, Condition cond = AL);
592 void strex(Register rd, Register rt, Register rn, Condition cond = AL); 592 void strex(Register rd, Register rt, Register rn, Condition cond = AL);
593 593
594 // Miscellaneous instructions. 594 // Miscellaneous instructions.
595 void clrex(); 595 void clrex();
596 void nop(Condition cond = AL); 596 void nop(Condition cond = AL);
597 597
598 #if 0 598 #if 0
599 // Moved to: ARM32::AssemblerARM32::bkpt() 599 // Moved to ARM32::AssemblerARM32::bkpt()
600 // Note that gdb sets breakpoints using the undefined instruction 0xe7f001f0. 600 // Note that gdb sets breakpoints using the undefined instruction 0xe7f001f0.
601 void bkpt(uint16_t imm16); 601 void bkpt(uint16_t imm16);
602 602
603 static int32_t BkptEncoding(uint16_t imm16) { 603 static int32_t BkptEncoding(uint16_t imm16) {
604 // bkpt requires that the cond field is AL. 604 // bkpt requires that the cond field is AL.
605 return (AL << kConditionShift) | B24 | B21 | 605 return (AL << kConditionShift) | B24 | B21 |
606 ((imm16 >> 4) << 8) | B6 | B5 | B4 | (imm16 & 0xf); 606 ((imm16 >> 4) << 8) | B6 | B5 | B4 | (imm16 & 0xf);
607 } 607 }
608 #endif 608 #endif
609 609
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717 717
718 // Each byte of dm is an index into the table of bytes formed by concatenating 718 // Each byte of dm is an index into the table of bytes formed by concatenating
719 // a list of 'length' registers starting with dn. The result is placed in dd. 719 // a list of 'length' registers starting with dn. The result is placed in dd.
720 void vtbl(DRegister dd, DRegister dn, int length, DRegister dm); 720 void vtbl(DRegister dd, DRegister dn, int length, DRegister dm);
721 721
722 // The words of qd and qm are interleaved with the low words of the result 722 // The words of qd and qm are interleaved with the low words of the result
723 // in qd and the high words in qm. 723 // in qd and the high words in qm.
724 void vzipqw(QRegister qd, QRegister qm); 724 void vzipqw(QRegister qd, QRegister qm);
725 725
726 // Branch instructions. 726 // Branch instructions.
727 #if 0
728 // Moved to ARM32::AssemblerARM32::b();
727 void b(Label* label, Condition cond = AL); 729 void b(Label* label, Condition cond = AL);
730 // Moved to ARM32::AssemblerARM32::bl()
728 void bl(Label* label, Condition cond = AL); 731 void bl(Label* label, Condition cond = AL);
729 #if 0 732 // Moved to ARM32::AssemblerARM32::bx()
730 // Moved to: ARM32::AssemblerARM32::bx()
731 void bx(Register rm, Condition cond = AL); 733 void bx(Register rm, Condition cond = AL);
734 // Moved to ARM32::AssemblerARM32::blx()
735 void blx(Register rm, Condition cond = AL);
732 #endif 736 #endif
733 void blx(Register rm, Condition cond = AL);
734 737
735 void Branch(const StubEntry& stub_entry, 738 void Branch(const StubEntry& stub_entry,
736 Patchability patchable = kNotPatchable, 739 Patchability patchable = kNotPatchable,
737 Register pp = PP, 740 Register pp = PP,
738 Condition cond = AL); 741 Condition cond = AL);
739 742
740 void BranchLink(const StubEntry& stub_entry, 743 void BranchLink(const StubEntry& stub_entry,
741 Patchability patchable = kNotPatchable); 744 Patchability patchable = kNotPatchable);
742 void BranchLink(const Code& code, Patchability patchable); 745 void BranchLink(const Code& code, Patchability patchable);
743 746
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1257 DRegister dd, 1260 DRegister dd,
1258 SRegister sm); 1261 SRegister sm);
1259 1262
1260 void EmitSIMDqqq(int32_t opcode, OperandSize sz, 1263 void EmitSIMDqqq(int32_t opcode, OperandSize sz,
1261 QRegister qd, QRegister qn, QRegister qm); 1264 QRegister qd, QRegister qn, QRegister qm);
1262 1265
1263 void EmitSIMDddd(int32_t opcode, OperandSize sz, 1266 void EmitSIMDddd(int32_t opcode, OperandSize sz,
1264 DRegister dd, DRegister dn, DRegister dm); 1267 DRegister dd, DRegister dn, DRegister dm);
1265 1268
1266 void EmitFarBranch(Condition cond, int32_t offset, bool link); 1269 void EmitFarBranch(Condition cond, int32_t offset, bool link);
1270 #if 0
1271 // Moved to ARM32::AssemblerARM32::emitBranch()
1267 void EmitBranch(Condition cond, Label* label, bool link); 1272 void EmitBranch(Condition cond, Label* label, bool link);
1268 #if 0
1269 // Moved to ARM32::AssemblerARM32::encodeBranchoffset(). 1273 // Moved to ARM32::AssemblerARM32::encodeBranchoffset().
1270 int32_t EncodeBranchOffset(int32_t offset, int32_t inst); 1274 int32_t EncodeBranchOffset(int32_t offset, int32_t inst);
1271 // Moved to ARM32::AssemberARM32::decodeBranchOffset(). 1275 // Moved to ARM32::AssemberARM32::decodeBranchOffset().
1272 static int32_t DecodeBranchOffset(int32_t inst); 1276 static int32_t DecodeBranchOffset(int32_t inst);
1273 #endif 1277 #endif
1274 int32_t EncodeTstOffset(int32_t offset, int32_t inst); 1278 int32_t EncodeTstOffset(int32_t offset, int32_t inst);
1275 int32_t DecodeTstOffset(int32_t inst); 1279 int32_t DecodeTstOffset(int32_t inst);
1276 1280
1277 void StoreIntoObjectFilter(Register object, Register value, Label* no_update); 1281 void StoreIntoObjectFilter(Register object, Register value, Label* no_update);
1278 1282
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1307 // ARM32::AssemblerARM::uxt() (uxtb and uxth). 1311 // ARM32::AssemblerARM::uxt() (uxtb and uxth).
1308 #endif 1312 #endif
1309 1313
1310 DISALLOW_ALLOCATION(); 1314 DISALLOW_ALLOCATION();
1311 DISALLOW_COPY_AND_ASSIGN(Assembler); 1315 DISALLOW_COPY_AND_ASSIGN(Assembler);
1312 }; 1316 };
1313 1317
1314 } // namespace dart 1318 } // namespace dart
1315 1319
1316 #endif // VM_ASSEMBLER_ARM_H_ 1320 #endif // VM_ASSEMBLER_ARM_H_
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