Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(141)

Side by Side Diff: src/DartARM32/assembler_arm.cc

Issue 1452293003: Add BL (immediate) and BLX (register) to ARM assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix nits. Created 5 years, 1 month ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
OLDNEW
1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 // 4 //
5 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe 5 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe
6 // Please update the (git) revision if we merge changes from Dart. 6 // Please update the (git) revision if we merge changes from Dart.
7 // https://code.google.com/p/dart/wiki/GettingTheSource 7 // https://code.google.com/p/dart/wiki/GettingTheSource
8 8
9 #include "vm/globals.h" // NOLINT 9 #include "vm/globals.h" // NOLINT
10 #if defined(TARGET_ARCH_ARM) 10 #if defined(TARGET_ARCH_ARM)
(...skipping 1449 matching lines...) Expand 10 before | Expand all | Expand 10 after
1460 EmitSIMDqqq(B24 | B9 | B8, sz, qd, qn, qm); 1460 EmitSIMDqqq(B24 | B9 | B8, sz, qd, qn, qm);
1461 } 1461 }
1462 1462
1463 1463
1464 void Assembler::vcgtqs(QRegister qd, QRegister qn, QRegister qm) { 1464 void Assembler::vcgtqs(QRegister qd, QRegister qn, QRegister qm) {
1465 EmitSIMDqqq(B24 | B21 | B11 | B10 | B9, kSWord, qd, qn, qm); 1465 EmitSIMDqqq(B24 | B21 | B11 | B10 | B9, kSWord, qd, qn, qm);
1466 } 1466 }
1467 1467
1468 1468
1469 #if 0 1469 #if 0
1470 // Moved to: ARM32::AssemblerARM32::bkpt() 1470 // Moved to ARM32::AssemblerARM32::bkpt()
1471 void Assembler::bkpt(uint16_t imm16) { 1471 void Assembler::bkpt(uint16_t imm16) {
1472 Emit(BkptEncoding(imm16)); 1472 Emit(BkptEncoding(imm16));
1473 } 1473 }
1474 #endif 1474 #endif
1475 1475
1476 1476
1477 void Assembler::b(Label* label, Condition cond) { 1477 void Assembler::b(Label* label, Condition cond) {
1478 EmitBranch(cond, label, false); 1478 EmitBranch(cond, label, false);
1479 } 1479 }
1480 1480
1481 1481
1482 #if 0
1483 // Moved to ARM32::AssemblerARM32::bl()
1482 void Assembler::bl(Label* label, Condition cond) { 1484 void Assembler::bl(Label* label, Condition cond) {
1483 EmitBranch(cond, label, true); 1485 EmitBranch(cond, label, true);
1484 } 1486 }
1485 1487
1486 #if 0 1488 // Moved to ARM32::AssemblerARM32::bx()
1487 // Moved to: ARM32::AssemblerARM32::bx()
1488 void Assembler::bx(Register rm, Condition cond) { 1489 void Assembler::bx(Register rm, Condition cond) {
1489 ASSERT(rm != kNoRegister); 1490 ASSERT(rm != kNoRegister);
1490 ASSERT(cond != kNoCondition); 1491 ASSERT(cond != kNoCondition);
1491 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 1492 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) |
1492 B24 | B21 | (0xfff << 8) | B4 | 1493 B24 | B21 | (0xfff << 8) | B4 |
1493 (static_cast<int32_t>(rm) << kRmShift); 1494 (static_cast<int32_t>(rm) << kRmShift);
1494 Emit(encoding); 1495 Emit(encoding);
1495 } 1496 }
1496 #endif
1497 1497
1498 1498 // Moved to ARM32::AssemblerARM32::blx()
1499 void Assembler::blx(Register rm, Condition cond) { 1499 void Assembler::blx(Register rm, Condition cond) {
1500 ASSERT(rm != kNoRegister); 1500 ASSERT(rm != kNoRegister);
1501 ASSERT(cond != kNoCondition); 1501 ASSERT(cond != kNoCondition);
1502 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | 1502 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) |
1503 B24 | B21 | (0xfff << 8) | B5 | B4 | 1503 B24 | B21 | (0xfff << 8) | B5 | B4 |
1504 (static_cast<int32_t>(rm) << kRmShift); 1504 (static_cast<int32_t>(rm) << kRmShift);
1505 Emit(encoding); 1505 Emit(encoding);
1506 } 1506 }
1507 #endif
1507 1508
1508 1509
1509 void Assembler::MarkExceptionHandler(Label* label) { 1510 void Assembler::MarkExceptionHandler(Label* label) {
1510 EmitType01(AL, 1, TST, 1, PC, R0, Operand(0)); 1511 EmitType01(AL, 1, TST, 1, PC, R0, Operand(0));
1511 Label l; 1512 Label l;
1512 b(&l); 1513 b(&l);
1513 EmitBranch(AL, label, false); 1514 EmitBranch(AL, label, false);
1514 Bind(&l); 1515 Bind(&l);
1515 } 1516 }
1516 1517
(...skipping 832 matching lines...) Expand 10 before | Expand all | Expand 10 after
2349 int32_t next = buffer_.Load<int32_t>(position); 2350 int32_t next = buffer_.Load<int32_t>(position);
2350 int32_t encoded = Assembler::EncodeBranchOffset(dest, next); 2351 int32_t encoded = Assembler::EncodeBranchOffset(dest, next);
2351 buffer_.Store<int32_t>(position, encoded); 2352 buffer_.Store<int32_t>(position, encoded);
2352 label->position_ = Assembler::DecodeBranchOffset(next); 2353 label->position_ = Assembler::DecodeBranchOffset(next);
2353 } 2354 }
2354 } 2355 }
2355 label->BindTo(bound_pc); 2356 label->BindTo(bound_pc);
2356 } 2357 }
2357 2358
2358 #if 0 2359 #if 0
2359 // Moved to: ARM32::AssemblerARM32::bind(Label* Label) 2360 // Moved to ARM32::AssemblerARM32::bind(Label* Label)
2360 // Note: Most of this code isn't needed because instruction selection has 2361 // Note: Most of this code isn't needed because instruction selection has
2361 // already been handler 2362 // already been handler
2362 void Assembler::BindARMv7(Label* label) { 2363 void Assembler::BindARMv7(Label* label) {
2363 ASSERT(!label->IsBound()); 2364 ASSERT(!label->IsBound());
2364 intptr_t bound_pc = buffer_.Size(); 2365 intptr_t bound_pc = buffer_.Size();
2365 while (label->IsLinked()) { 2366 while (label->IsLinked()) {
2366 const int32_t position = label->Position(); 2367 const int32_t position = label->Position();
2367 int32_t dest = bound_pc - position; 2368 int32_t dest = bound_pc - position;
2368 if (use_far_branches() && !CanEncodeBranchOffset(dest)) { 2369 if (use_far_branches() && !CanEncodeBranchOffset(dest)) {
2369 // Far branches are enabled and we can't encode the branch offset. 2370 // Far branches are enabled and we can't encode the branch offset.
(...skipping 1320 matching lines...) Expand 10 before | Expand all | Expand 10 after
3690 3691
3691 3692
3692 const char* Assembler::FpuRegisterName(FpuRegister reg) { 3693 const char* Assembler::FpuRegisterName(FpuRegister reg) {
3693 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); 3694 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
3694 return fpu_reg_names[reg]; 3695 return fpu_reg_names[reg];
3695 } 3696 }
3696 3697
3697 } // namespace dart 3698 } // namespace dart
3698 3699
3699 #endif // defined TARGET_ARCH_ARM 3700 #endif // defined TARGET_ARCH_ARM
OLDNEW
« no previous file with comments | « src/DartARM32/assembler_arm.h ('k') | src/IceAssemblerARM32.h » ('j') | src/IceAssemblerARM32.h » ('J')

Powered by Google App Engine
This is Rietveld 408576698