Eliminate stack adjustment for float-returning functions

src/IceTargetLoweringX86BaseImpl.h

 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 5180 matching lines @@
       // Skip over the instruction.
       Context.advanceNext();
     }
   }
 }
 
 template <class Machine>
 void TargetX86Base<Machine>::lowerUnreachable(
     const InstUnreachable * /*Inst*/) {
   _ud2();
+  // Add a fake use of esp to make sure esp stays alive for the entire

[Jim Stichnoth, 2015/11/13 23:30:33]

Could you factor this code and its lowerRet clone into a private helper
function?  Call it something like keepEspLiveAtExit().

[sehr, 2015/11/14 00:30:56]

Done.

+  // function. Otherwise post-call esp adjustments get dead-code eliminated.
+  // TODO: Are there more places where the fake use should be inserted? E.g.

[Jim Stichnoth, 2015/11/13 23:30:33]

Remove this TODO because I'm pretty sure this covers everything by now.  The
non-returning test case seems to be fine.

[sehr, 2015/11/14 00:30:56]

Done.

+  // "void f(int n){while(1) g(n);}" may not have an unreachable instruction.
+  Variable *esp =
+      Func->getTarget()->getPhysicalRegister(Traits::RegisterSet::Reg_esp);

[Jim Stichnoth, 2015/11/13 23:30:33]

Use getStackReg() instead of Reg_esp.

BTW, getStackReg() will probably need to be put into Traits and redirected to
Reg_rsp under x86-64, but at least that's one fewer place to track down.

[sehr, 2015/11/14 00:30:56]

Done.

+  Context.insert(InstFakeUse::create(Func, esp));
 }
 
 template <class Machine>
 void TargetX86Base<Machine>::lowerRMW(
     const typename Traits::Insts::FakeRMW *RMW) {
   // If the beacon variable's live range does not end in this instruction, then
   // it must end in the modified Store instruction that follows. This means
   // that the original Store instruction is still there, either because the
   // value being stored is used beyond the Store instruction, or because dead
   // code elimination did not happen. In either case, we cancel RMW lowering
@@ skipping 767 matching lines @@
   }
   // the offset is not eligible for blinding or pooling, return the original
   // mem operand
   return MemOperand;
 }
 
 } // end of namespace X86Internal
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H