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Side by Side Diff: src/IceTargetLoweringARM32.h

Issue 1449263003: Subzero. ARM32. Introduces the ShAmtImm Operand. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 5 years, 1 month ago
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1 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===// 1 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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149 Legal_Mem = 1 << 2, /// includes [r0, r1 lsl #2] as well as [sp, #12] 149 Legal_Mem = 1 << 2, /// includes [r0, r1 lsl #2] as well as [sp, #12]
150 Legal_All = ~Legal_None 150 Legal_All = ~Legal_None
151 }; 151 };
152 152
153 using LegalMask = uint32_t; 153 using LegalMask = uint32_t;
154 Operand *legalizeUndef(Operand *From, int32_t RegNum = Variable::NoRegister); 154 Operand *legalizeUndef(Operand *From, int32_t RegNum = Variable::NoRegister);
155 Operand *legalize(Operand *From, LegalMask Allowed = Legal_All, 155 Operand *legalize(Operand *From, LegalMask Allowed = Legal_All,
156 int32_t RegNum = Variable::NoRegister); 156 int32_t RegNum = Variable::NoRegister);
157 Variable *legalizeToReg(Operand *From, int32_t RegNum = Variable::NoRegister); 157 Variable *legalizeToReg(Operand *From, int32_t RegNum = Variable::NoRegister);
158 158
159 OperandARM32ShAmtImm *shAmtImm(uint32_t ShAmtImm) const {
160 assert(ShAmtImm < 32);
161 return OperandARM32ShAmtImm::create(
162 Func,
163 llvm::cast<ConstantInteger32>(Ctx->getConstantInt32(ShAmtImm & 0x1F)));
164 }
165
159 GlobalContext *getCtx() const { return Ctx; } 166 GlobalContext *getCtx() const { return Ctx; }
160 167
161 protected: 168 protected:
162 explicit TargetARM32(Cfg *Func); 169 explicit TargetARM32(Cfg *Func);
163 170
164 void postLower() override; 171 void postLower() override;
165 172
166 enum SafeBoolChain { 173 enum SafeBoolChain {
167 SBC_No, 174 SBC_No,
168 SBC_Yes, 175 SBC_Yes,
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989 996
990 private: 997 private:
991 ~TargetHeaderARM32() = default; 998 ~TargetHeaderARM32() = default;
992 999
993 TargetARM32Features CPUFeatures; 1000 TargetARM32Features CPUFeatures;
994 }; 1001 };
995 1002
996 } // end of namespace Ice 1003 } // end of namespace Ice
997 1004
998 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H 1005 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H
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