MIPS: Fix trampoline pool handling in MacroAssembler::BranchShort() for r6.

test/cctest/test-assembler-mips.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
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 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
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@@ skipping 5084 matching lines @@
     {       4,      1 },
   };
 
   size_t nr_test_cases = sizeof(tc) / sizeof(TestCaseBal);
   for (size_t i = 0; i < nr_test_cases; ++i) {
     CHECK_EQ(tc[i].expected_res, run_bal(tc[i].offset));
   }
 }
 
 
+TEST(Trampoline) {
+  if (IsMipsArchVariant(kMips32r6)) {

[paul.l..., 2015/11/17 19:59:45]

Does this test have to be r6-only? Can we write a test that hits the boundary
cases for both r2 & r6? (for mips64 as well).

[balazs.kilvady, 2015/11/18 12:22:53]

I am thinking about it. Would be fine.

[balazs.kilvady, 2015/11/18 14:04:05]

Fortunately this test case forces trampoline generation on all the MIPS revs so
I uploaded a patchiest to fix/enable it.
Done.

+    // Private member of Assembler class.
+    static const int kMaxBranchOffset = (1 << (18 - 1)) - 1;
+
+    CcTest::InitializeVM();
+    Isolate* isolate = CcTest::i_isolate();
+    HandleScope scope(isolate);
+
+    MacroAssembler assm(isolate, NULL, 0);
+    Label done;
+    size_t nr_calls = kMaxBranchOffset / (2 * Instruction::kInstrSize) + 2;
+
+    for (size_t i = 0; i < nr_calls; ++i) {
+      __ BranchShort(&done, eq, a0, Operand(a1));
+    }
+    __ bind(&done);
+    __ Ret(USE_DELAY_SLOT);
+    __ mov(v0, zero_reg);
+
+    CodeDesc desc;
+    assm.GetCode(&desc);
+    Handle<Code> code = isolate->factory()->NewCode(
+        desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
+    F2 f = FUNCTION_CAST<F2>(code->entry());
+
+    int32_t res =
+        reinterpret_cast<int32_t>(CALL_GENERATED_CODE(f, 5, 5, 0, 0, 0));
+    CHECK_EQ(res, 0);
+  }
+}
+
+
 #undef __