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Issue 14431004: Implements missing features to run Hello, World in checked mode on MIPS. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 7 years, 7 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_MIPS) 6 #if defined(TARGET_ARCH_MIPS)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/code_generator.h" 9 #include "vm/code_generator.h"
10 #include "vm/compiler.h" 10 #include "vm/compiler.h"
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1655 ASSERT(kExceptionObjectReg == V0); 1655 ASSERT(kExceptionObjectReg == V0);
1656 ASSERT(kStackTraceObjectReg == V1); 1656 ASSERT(kStackTraceObjectReg == V1);
1657 __ mov(V0, A3); // Exception object. 1657 __ mov(V0, A3); // Exception object.
1658 __ lw(V1, Address(SP, 0)); // StackTrace object. 1658 __ lw(V1, Address(SP, 0)); // StackTrace object.
1659 __ mov(FP, A2); // Frame_pointer. 1659 __ mov(FP, A2); // Frame_pointer.
1660 __ mov(SP, A1); // Stack pointer. 1660 __ mov(SP, A1); // Stack pointer.
1661 __ jr(A0); // Jump to the exception handler code. 1661 __ jr(A0); // Jump to the exception handler code.
1662 } 1662 }
1663 1663
1664 1664
1665 // Implements equality operator when one of the arguments is null
1666 // (identity check) and updates ICData if necessary.
1667 // RA: return address.
1668 // A1: left argument.
1669 // A0: right argument.
1670 // T0: ICData.
1671 // V0: result.
1672 // TODO(srdjan): Move to VM stubs once Boolean objects become VM objects.
1665 void StubCode::GenerateEqualityWithNullArgStub(Assembler* assembler) { 1673 void StubCode::GenerateEqualityWithNullArgStub(Assembler* assembler) {
1666 __ Unimplemented("EqualityWithNullArg Stub"); 1674 __ EnterStubFrame();
1675 static const intptr_t kNumArgsTested = 2;
1676 #if defined(DEBUG)
1677 { Label ok;
1678 __ lw(TMP1, FieldAddress(T0, ICData::num_args_tested_offset()));
1679 __ BranchEqual(TMP1, kNumArgsTested, &ok);
1680 __ Stop("Incorrect ICData for equality");
1681 __ Bind(&ok);
1682 }
1683 #endif // DEBUG
1684 // Check IC data, update if needed.
1685 // T0: IC data object (preserved).
1686 __ lw(T6, FieldAddress(T0, ICData::ic_data_offset()));
1687 // T6: ic_data_array with check entries: classes and target functions.
1688 __ AddImmediate(T6, Array::data_offset() - kHeapObjectTag);
1689 // T6: points directly to the first ic data array element.
1690
1691 Label get_class_id_as_smi, no_match, loop, found;
1692 __ Bind(&loop);
1693 // Check left.
1694 __ bal(&get_class_id_as_smi);
1695 __ delay_slot()->mov(T2, A1);
1696 __ lw(T3, Address(T6, 0 * kWordSize));
1697 __ bne(T2, T3, &no_match); // Class id match?
1698
1699 // Check right.
1700 __ bal(&get_class_id_as_smi);
1701 __ delay_slot()->mov(T2, A0);
1702 __ lw(T3, Address(T6, 1 * kWordSize));
1703 __ beq(T2, T3, &found); // Class id match?
1704 __ Bind(&no_match);
1705 // Next check group.
1706 __ AddImmediate(T6, kWordSize * ICData::TestEntryLengthFor(kNumArgsTested));
1707 __ BranchNotEqual(T3, Smi::RawValue(kIllegalCid), &loop); // Done?
1708
1709 Label update_ic_data;
1710 __ b(&update_ic_data);
1711
1712 __ Bind(&found);
1713 const intptr_t count_offset =
1714 ICData::CountIndexFor(kNumArgsTested) * kWordSize;
1715 Label no_overflow;
1716 __ lw(T1, Address(T6, count_offset));
1717 __ AddImmediateDetectOverflow(T1, T1, Smi::RawValue(1), CMPRES);
1718 __ bgez(CMPRES, &no_overflow);
1719 __ LoadImmediate(TMP1, Smi::RawValue(Smi::kMaxValue));
1720 __ sw(TMP1, Address(T6, count_offset)); // If overflow.
1721 __ Bind(&no_overflow);
1722
1723 Label compute_result;
1724 __ Bind(&compute_result);
1725 __ LoadObject(TMP1, Bool::True());
1726 __ LoadObject(TMP2, Bool::False());
1727 __ subu(CMPRES, A0, A1);
1728 __ movz(V0, TMP1, CMPRES);
1729 __ movn(V0, TMP2, CMPRES);
1730 __ LeaveStubFrame();
1731 __ Ret();
1732
1733 __ Bind(&get_class_id_as_smi);
1734 // Test if Smi -> load Smi class for comparison.
1735 Label not_smi;
1736 __ andi(CMPRES, T2, Immediate(kSmiTagMask));
1737 __ bne(CMPRES, ZR, &not_smi);
1738 __ jr(RA);
1739 __ delay_slot()->addiu(T2, ZR, Immediate(Smi::RawValue(kSmiCid)));
1740 __ Bind(&not_smi);
1741 __ LoadClassId(T2, T2);
1742 __ jr(RA);
1743 __ delay_slot()->SmiTag(T2);
1744
1745 __ Bind(&update_ic_data);
1746 // T0: ICData
1747 __ addiu(SP, SP, Immediate(-4 * kWordSize));
1748 __ sw(A1, Address(SP, 3 * kWordSize));
1749 __ sw(A0, Address(SP, 2 * kWordSize));
1750 __ LoadObject(TMP1, Symbols::EqualOperator()); // Target's name.
1751 __ sw(TMP1, Address(SP, 1 * kWordSize));
1752 __ sw(T0, Address(SP, 0 * kWordSize)); // ICData.
1753 __ CallRuntime(kUpdateICDataTwoArgsRuntimeEntry);
1754 __ lw(A0, Address(SP, 2 * kWordSize));
1755 __ lw(A1, Address(SP, 3 * kWordSize));
1756 __ b(&compute_result);
1757 __ delay_slot()->addiu(SP, SP, Immediate(4 * kWordSize));
1667 } 1758 }
1668 1759
1669 1760
1670 // Calls to the runtime to optimize the given function. 1761 // Calls to the runtime to optimize the given function.
1671 // T0: function to be reoptimized. 1762 // T0: function to be reoptimized.
1672 // S4: argument descriptor (preserved). 1763 // S4: argument descriptor (preserved).
1673 void StubCode::GenerateOptimizeFunctionStub(Assembler* assembler) { 1764 void StubCode::GenerateOptimizeFunctionStub(Assembler* assembler) {
1674 __ TraceSimMsg("OptimizeFunctionStub"); 1765 __ TraceSimMsg("OptimizeFunctionStub");
1675 __ EnterStubFrame(); 1766 __ EnterStubFrame();
1676 __ addiu(SP, SP, Immediate(-3 * kWordSize)); 1767 __ addiu(SP, SP, Immediate(-3 * kWordSize));
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1790 __ Bind(&done); 1881 __ Bind(&done);
1791 __ lw(T0, Address(SP, 0 * kWordSize)); 1882 __ lw(T0, Address(SP, 0 * kWordSize));
1792 __ lw(T1, Address(SP, 1 * kWordSize)); 1883 __ lw(T1, Address(SP, 1 * kWordSize));
1793 __ Ret(); 1884 __ Ret();
1794 __ delay_slot()->addiu(SP, SP, Immediate(2 * kWordSize)); 1885 __ delay_slot()->addiu(SP, SP, Immediate(2 * kWordSize));
1795 } 1886 }
1796 1887
1797 } // namespace dart 1888 } // namespace dart
1798 1889
1799 #endif // defined TARGET_ARCH_MIPS 1890 #endif // defined TARGET_ARCH_MIPS
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