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Issue 1440293002: [turbofan] Added the optional Float64RoundTiesEven operator to turbofan. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@f64roundup
Patch Set: Disabled F64RoundTiesEven on mips32 Created 5 years, 1 month ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ 5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_
6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ 6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 51 matching lines...) Expand 10 before | Expand all | Expand 10 after
62 V(ArmVmlsF64) \ 62 V(ArmVmlsF64) \
63 V(ArmVdivF64) \ 63 V(ArmVdivF64) \
64 V(ArmVmodF64) \ 64 V(ArmVmodF64) \
65 V(ArmVabsF64) \ 65 V(ArmVabsF64) \
66 V(ArmVnegF64) \ 66 V(ArmVnegF64) \
67 V(ArmVsqrtF64) \ 67 V(ArmVsqrtF64) \
68 V(ArmVrintmF64) \ 68 V(ArmVrintmF64) \
69 V(ArmVrintpF64) \ 69 V(ArmVrintpF64) \
70 V(ArmVrintzF64) \ 70 V(ArmVrintzF64) \
71 V(ArmVrintaF64) \ 71 V(ArmVrintaF64) \
72 V(ArmVrintnF64) \
72 V(ArmVcvtF32F64) \ 73 V(ArmVcvtF32F64) \
73 V(ArmVcvtF64F32) \ 74 V(ArmVcvtF64F32) \
74 V(ArmVcvtF64S32) \ 75 V(ArmVcvtF64S32) \
75 V(ArmVcvtF64U32) \ 76 V(ArmVcvtF64U32) \
76 V(ArmVcvtS32F64) \ 77 V(ArmVcvtS32F64) \
77 V(ArmVcvtU32F64) \ 78 V(ArmVcvtU32F64) \
78 V(ArmVmovLowU32F64) \ 79 V(ArmVmovLowU32F64) \
79 V(ArmVmovLowF64U32) \ 80 V(ArmVmovLowF64U32) \
80 V(ArmVmovHighU32F64) \ 81 V(ArmVmovHighU32F64) \
81 V(ArmVmovHighF64U32) \ 82 V(ArmVmovHighF64U32) \
(...skipping 30 matching lines...) Expand all
112 V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \ 113 V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \
113 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \ 114 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \
114 V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \ 115 V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \
115 V(Operand2_R_ROR_R) /* %r0 ROR %r1 */ 116 V(Operand2_R_ROR_R) /* %r0 ROR %r1 */
116 117
117 } // namespace compiler 118 } // namespace compiler
118 } // namespace internal 119 } // namespace internal
119 } // namespace v8 120 } // namespace v8
120 121
121 #endif // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ 122 #endif // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_
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