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Issue 1440293002: [turbofan] Added the optional Float64RoundTiesEven operator to turbofan. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@f64roundup
Patch Set: Disabled F64RoundTiesEven on mips32 Created 5 years, 1 month ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 6
7 #include "src/arm/macro-assembler-arm.h" 7 #include "src/arm/macro-assembler-arm.h"
8 #include "src/compiler/code-generator-impl.h" 8 #include "src/compiler/code-generator-impl.h"
9 #include "src/compiler/gap-resolver.h" 9 #include "src/compiler/gap-resolver.h"
10 #include "src/compiler/node-matchers.h" 10 #include "src/compiler/node-matchers.h"
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772 break; 772 break;
773 case kArmVrintpF64: 773 case kArmVrintpF64:
774 __ vrintp(i.OutputFloat64Register(), i.InputFloat64Register(0)); 774 __ vrintp(i.OutputFloat64Register(), i.InputFloat64Register(0));
775 break; 775 break;
776 case kArmVrintzF64: 776 case kArmVrintzF64:
777 __ vrintz(i.OutputFloat64Register(), i.InputFloat64Register(0)); 777 __ vrintz(i.OutputFloat64Register(), i.InputFloat64Register(0));
778 break; 778 break;
779 case kArmVrintaF64: 779 case kArmVrintaF64:
780 __ vrinta(i.OutputFloat64Register(), i.InputFloat64Register(0)); 780 __ vrinta(i.OutputFloat64Register(), i.InputFloat64Register(0));
781 break; 781 break;
782 case kArmVrintnF64:
783 __ vrintn(i.OutputFloat64Register(), i.InputFloat64Register(0));
784 break;
782 case kArmVcvtF32F64: { 785 case kArmVcvtF32F64: {
783 __ vcvt_f32_f64(i.OutputFloat32Register(), i.InputFloat64Register(0)); 786 __ vcvt_f32_f64(i.OutputFloat32Register(), i.InputFloat64Register(0));
784 DCHECK_EQ(LeaveCC, i.OutputSBit()); 787 DCHECK_EQ(LeaveCC, i.OutputSBit());
785 break; 788 break;
786 } 789 }
787 case kArmVcvtF64F32: { 790 case kArmVcvtF64F32: {
788 __ vcvt_f64_f32(i.OutputFloat64Register(), i.InputFloat32Register(0)); 791 __ vcvt_f64_f32(i.OutputFloat64Register(), i.InputFloat32Register(0));
789 DCHECK_EQ(LeaveCC, i.OutputSBit()); 792 DCHECK_EQ(LeaveCC, i.OutputSBit());
790 break; 793 break;
791 } 794 }
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1333 padding_size -= v8::internal::Assembler::kInstrSize; 1336 padding_size -= v8::internal::Assembler::kInstrSize;
1334 } 1337 }
1335 } 1338 }
1336 } 1339 }
1337 1340
1338 #undef __ 1341 #undef __
1339 1342
1340 } // namespace compiler 1343 } // namespace compiler
1341 } // namespace internal 1344 } // namespace internal
1342 } // namespace v8 1345 } // namespace v8
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