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1 /* | 1 /* |
2 * Copyright (C) 2006, 2007, 2008, 2009, 2013 Apple Inc. All rights reserved. | 2 * Copyright (C) 2006, 2007, 2008, 2009, 2013 Apple Inc. All rights reserved. |
3 * Copyright (C) 2007-2009 Torch Mobile, Inc. | 3 * Copyright (C) 2007-2009 Torch Mobile, Inc. |
4 * Copyright (C) 2010, 2011 Research In Motion Limited. All rights reserved. | 4 * Copyright (C) 2010, 2011 Research In Motion Limited. All rights reserved. |
5 * | 5 * |
6 * Redistribution and use in source and binary forms, with or without | 6 * Redistribution and use in source and binary forms, with or without |
7 * modification, are permitted provided that the following conditions | 7 * modification, are permitted provided that the following conditions |
8 * are met: | 8 * are met: |
9 * 1. Redistributions of source code must retain the above copyright | 9 * 1. Redistributions of source code must retain the above copyright |
10 * notice, this list of conditions and the following disclaimer. | 10 * notice, this list of conditions and the following disclaimer. |
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55 /* This also defines CPU(BIG_ENDIAN) or CPU(MIDDLE_ENDIAN) or neither, as approp
riate. */ | 55 /* This also defines CPU(BIG_ENDIAN) or CPU(MIDDLE_ENDIAN) or neither, as approp
riate. */ |
56 | 56 |
57 /* CPU(ALPHA) - DEC Alpha */ | 57 /* CPU(ALPHA) - DEC Alpha */ |
58 #if defined(__alpha__) | 58 #if defined(__alpha__) |
59 #define WTF_CPU_ALPHA 1 | 59 #define WTF_CPU_ALPHA 1 |
60 #endif | 60 #endif |
61 | 61 |
62 /* CPU(IA64) - Itanium / IA-64 */ | 62 /* CPU(IA64) - Itanium / IA-64 */ |
63 #if defined(__ia64__) | 63 #if defined(__ia64__) |
64 #define WTF_CPU_IA64 1 | 64 #define WTF_CPU_IA64 1 |
65 /* 32-bit mode on Itanium */ | |
66 #if !defined(__LP64__) | |
67 #define WTF_CPU_IA64_32 1 | |
68 #endif | |
69 #endif | 65 #endif |
70 | 66 |
71 /* CPU(MIPS) - MIPS 32-bit */ | 67 /* CPU(MIPS) - MIPS 32-bit */ |
72 /* Note: Only O32 ABI is tested, so we enable it for O32 ABI for now. */ | 68 /* Note: Only O32 ABI is tested, so we enable it for O32 ABI for now. */ |
73 #if (defined(mips) || defined(__mips__) || defined(MIPS) || defined(_MIPS_)) \ | 69 #if (defined(mips) || defined(__mips__) || defined(MIPS) || defined(_MIPS_)) \ |
74 && defined(_ABIO32) | 70 && defined(_ABIO32) |
75 #define WTF_CPU_MIPS 1 | 71 #define WTF_CPU_MIPS 1 |
76 #if defined(__MIPSEB__) | 72 #if defined(__MIPSEB__) |
77 #define WTF_CPU_BIG_ENDIAN 1 | 73 #define WTF_CPU_BIG_ENDIAN 1 |
78 #endif | 74 #endif |
79 #define WTF_MIPS_PIC (defined __PIC__) | |
80 #define WTF_MIPS_ARCH __mips | |
81 #define WTF_MIPS_ISA(v) (defined WTF_MIPS_ARCH && WTF_MIPS_ARCH == v) | |
82 #define WTF_MIPS_ISA_AT_LEAST(v) (defined WTF_MIPS_ARCH && WTF_MIPS_ARCH >= v) | |
83 #define WTF_MIPS_ARCH_REV __mips_isa_rev | |
84 #define WTF_MIPS_ISA_REV(v) (defined WTF_MIPS_ARCH_REV && WTF_MIPS_ARCH_REV == v
) | |
85 #define WTF_MIPS_DOUBLE_FLOAT (defined __mips_hard_float && !defined __mips_sing
le_float) | |
86 #define WTF_MIPS_FP64 (defined __mips_fpr && __mips_fpr == 64) | |
87 /* MIPS requires allocators to use aligned memory */ | 75 /* MIPS requires allocators to use aligned memory */ |
88 #define WTF_USE_ARENA_ALLOC_ALIGNMENT_INTEGER 1 | 76 #define WTF_USE_ARENA_ALLOC_ALIGNMENT_INTEGER 1 |
89 #endif /* MIPS */ | 77 #endif /* MIPS */ |
90 | 78 |
91 /* CPU(PPC) - PowerPC 32-bit */ | 79 /* CPU(PPC) - PowerPC 32-bit */ |
92 #if defined(__ppc__) \ | 80 #if defined(__ppc__) \ |
93 || defined(__PPC__) \ | 81 || defined(__PPC__) \ |
94 || defined(__powerpc__) \ | 82 || defined(__powerpc__) \ |
95 || defined(__powerpc) \ | 83 || defined(__powerpc) \ |
96 || defined(__POWERPC__) \ | 84 || defined(__POWERPC__) \ |
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158 | 146 |
159 /* CPU(ARM) - ARM, any version*/ | 147 /* CPU(ARM) - ARM, any version*/ |
160 #define WTF_ARM_ARCH_AT_LEAST(N) (CPU(ARM) && defined(WTF_ARM_ARCH_VERSION) && W
TF_ARM_ARCH_VERSION >= N) | 148 #define WTF_ARM_ARCH_AT_LEAST(N) (CPU(ARM) && defined(WTF_ARM_ARCH_VERSION) && W
TF_ARM_ARCH_VERSION >= N) |
161 | 149 |
162 #if defined(arm) \ | 150 #if defined(arm) \ |
163 || defined(__arm__) \ | 151 || defined(__arm__) \ |
164 || defined(ARM) \ | 152 || defined(ARM) \ |
165 || defined(_ARM_) | 153 || defined(_ARM_) |
166 #define WTF_CPU_ARM 1 | 154 #define WTF_CPU_ARM 1 |
167 | 155 |
168 #if defined(__ARM_PCS_VFP) | |
169 #define WTF_CPU_ARM_HARDFP 1 | |
170 #endif | |
171 | |
172 #if defined(__ARMEB__) | 156 #if defined(__ARMEB__) |
173 #define WTF_CPU_BIG_ENDIAN 1 | 157 #define WTF_CPU_BIG_ENDIAN 1 |
174 | 158 |
175 #elif !defined(__ARM_EABI__) \ | 159 #elif !defined(__ARM_EABI__) \ |
176 && !defined(__EABI__) \ | 160 && !defined(__EABI__) \ |
177 && !defined(__VFP_FP__) \ | 161 && !defined(__VFP_FP__) \ |
178 && !defined(_WIN32_WCE) \ | 162 && !defined(_WIN32_WCE) \ |
179 && !defined(ANDROID) | 163 && !defined(ANDROID) |
180 #define WTF_CPU_MIDDLE_ENDIAN 1 | 164 #define WTF_CPU_MIDDLE_ENDIAN 1 |
181 | 165 |
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243 || defined(__ARM_ARCH_7M__) \ | 227 || defined(__ARM_ARCH_7M__) \ |
244 || defined(__ARM_ARCH_7R__) \ | 228 || defined(__ARM_ARCH_7R__) \ |
245 || defined(__ARM_ARCH_7S__) | 229 || defined(__ARM_ARCH_7S__) |
246 #define WTF_THUMB_ARCH_VERSION 4 | 230 #define WTF_THUMB_ARCH_VERSION 4 |
247 | 231 |
248 #else | 232 #else |
249 #define WTF_THUMB_ARCH_VERSION 0 | 233 #define WTF_THUMB_ARCH_VERSION 0 |
250 #endif | 234 #endif |
251 | 235 |
252 | 236 |
253 /* CPU(ARMV5_OR_LOWER) - ARM instruction set v5 or earlier */ | |
254 /* On ARMv5 and below the natural alignment is required. | |
255 And there are some other differences for v5 or earlier. */ | |
256 #if !defined(ARMV5_OR_LOWER) && !WTF_ARM_ARCH_AT_LEAST(6) | |
257 #define WTF_CPU_ARMV5_OR_LOWER 1 | |
258 #endif | |
259 | |
260 | |
261 /* CPU(ARM_TRADITIONAL) - Thumb2 is not available, only traditional ARM (v4 or g
reater) */ | 237 /* CPU(ARM_TRADITIONAL) - Thumb2 is not available, only traditional ARM (v4 or g
reater) */ |
262 /* CPU(ARM_THUMB2) - Thumb2 instruction set is available */ | 238 /* CPU(ARM_THUMB2) - Thumb2 instruction set is available */ |
263 /* Only one of these will be defined. */ | 239 /* Only one of these will be defined. */ |
264 #if !defined(WTF_CPU_ARM_TRADITIONAL) && !defined(WTF_CPU_ARM_THUMB2) | 240 #if !defined(WTF_CPU_ARM_TRADITIONAL) && !defined(WTF_CPU_ARM_THUMB2) |
265 # if defined(thumb2) || defined(__thumb2__) \ | 241 # if defined(thumb2) || defined(__thumb2__) \ |
266 || ((defined(__thumb) || defined(__thumb__)) && WTF_THUMB_ARCH_VERSION == 4) | 242 || ((defined(__thumb) || defined(__thumb__)) && WTF_THUMB_ARCH_VERSION == 4) |
267 # define WTF_CPU_ARM_TRADITIONAL 0 | 243 # define WTF_CPU_ARM_TRADITIONAL 0 |
268 # define WTF_CPU_ARM_THUMB2 1 | 244 # define WTF_CPU_ARM_THUMB2 1 |
269 # elif WTF_ARM_ARCH_AT_LEAST(4) | 245 # elif WTF_ARM_ARCH_AT_LEAST(4) |
270 # define WTF_CPU_ARM_TRADITIONAL 1 | 246 # define WTF_CPU_ARM_TRADITIONAL 1 |
271 # define WTF_CPU_ARM_THUMB2 0 | 247 # define WTF_CPU_ARM_THUMB2 0 |
272 # else | 248 # else |
273 # error "Not supported ARM architecture" | 249 # error "Not supported ARM architecture" |
274 # endif | 250 # endif |
275 #elif CPU(ARM_TRADITIONAL) && CPU(ARM_THUMB2) /* Sanity Check */ | 251 #elif CPU(ARM_TRADITIONAL) && CPU(ARM_THUMB2) /* Sanity Check */ |
276 # error "Cannot use both of WTF_CPU_ARM_TRADITIONAL and WTF_CPU_ARM_THUMB2 plat
forms" | 252 # error "Cannot use both of WTF_CPU_ARM_TRADITIONAL and WTF_CPU_ARM_THUMB2 plat
forms" |
277 #endif /* !defined(WTF_CPU_ARM_TRADITIONAL) && !defined(WTF_CPU_ARM_THUMB2) */ | 253 #endif /* !defined(WTF_CPU_ARM_TRADITIONAL) && !defined(WTF_CPU_ARM_THUMB2) */ |
278 | 254 |
279 #if defined(__ARM_NEON__) && !defined(WTF_CPU_ARM_NEON) | 255 #if defined(__ARM_NEON__) && !defined(WTF_CPU_ARM_NEON) |
280 #define WTF_CPU_ARM_NEON 1 | 256 #define WTF_CPU_ARM_NEON 1 |
281 #endif | 257 #endif |
282 | 258 |
283 #if CPU(ARM_NEON) && (!COMPILER(GCC) || GCC_VERSION_AT_LEAST(4, 7, 0)) | 259 #if CPU(ARM_NEON) && (!COMPILER(GCC) || GCC_VERSION_AT_LEAST(4, 7, 0)) |
284 // All NEON intrinsics usage can be disabled by this macro. | 260 // All NEON intrinsics usage can be disabled by this macro. |
285 #define HAVE_ARM_NEON_INTRINSICS 1 | 261 #define HAVE_ARM_NEON_INTRINSICS 1 |
286 #endif | 262 #endif |
287 | 263 |
288 #if (defined(__VFP_FP__) && !defined(__SOFTFP__)) | |
289 #define WTF_CPU_ARM_VFP 1 | |
290 #endif | |
291 | |
292 #if defined(__ARM_ARCH_7S__) | 264 #if defined(__ARM_ARCH_7S__) |
293 #define WTF_CPU_APPLE_ARMV7S 1 | 265 #define WTF_CPU_APPLE_ARMV7S 1 |
294 #endif | 266 #endif |
295 | 267 |
296 #endif /* ARM */ | 268 #endif /* ARM */ |
297 | 269 |
298 #if CPU(ARM) || CPU(MIPS) || CPU(SH4) || CPU(SPARC) | |
299 #define WTF_CPU_NEEDS_ALIGNED_ACCESS 1 | |
300 #endif | |
301 | |
302 /* ==== OS() - underlying operating system; only to be used for mandated low-lev
el services like | 270 /* ==== OS() - underlying operating system; only to be used for mandated low-lev
el services like |
303 virtual memory, not to choose a GUI toolkit ==== */ | 271 virtual memory, not to choose a GUI toolkit ==== */ |
304 | 272 |
305 /* OS(ANDROID) - Android */ | 273 /* OS(ANDROID) - Android */ |
306 #ifdef ANDROID | 274 #ifdef ANDROID |
307 #define WTF_OS_ANDROID 1 | 275 #define WTF_OS_ANDROID 1 |
308 #endif | 276 #endif |
309 | 277 |
310 /* OS(AIX) - AIX */ | 278 /* OS(AIX) - AIX */ |
311 #ifdef _AIX | 279 #ifdef _AIX |
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481 | 449 |
482 #if !defined(ENABLE_THREADING_LIBDISPATCH) && HAVE(DISPATCH_H) | 450 #if !defined(ENABLE_THREADING_LIBDISPATCH) && HAVE(DISPATCH_H) |
483 #define ENABLE_THREADING_LIBDISPATCH 1 | 451 #define ENABLE_THREADING_LIBDISPATCH 1 |
484 #elif !defined(ENABLE_THREADING_OPENMP) && defined(_OPENMP) | 452 #elif !defined(ENABLE_THREADING_OPENMP) && defined(_OPENMP) |
485 #define ENABLE_THREADING_OPENMP 1 | 453 #define ENABLE_THREADING_OPENMP 1 |
486 #elif !defined(THREADING_GENERIC) | 454 #elif !defined(THREADING_GENERIC) |
487 #define ENABLE_THREADING_GENERIC 1 | 455 #define ENABLE_THREADING_GENERIC 1 |
488 #endif | 456 #endif |
489 | 457 |
490 #endif /* WTF_Platform_h */ | 458 #endif /* WTF_Platform_h */ |
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